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Numéro de sérieMAX1121
CategorieData Conversion => ADC (Analog to Digital Converters) => <10 bit => 8 bit
Description1.8V, 8-Bit, 250Msps Analog-to-Digital Converter With LVDS Outputs For Wideband Applications
The MAX1121 is a monolithic 8-bit, 250Msps analog-to-digital converter (ADC) optimized for outstanding dynamic performance at high IF frequencies up to 500MHz. The product operates with conversion rates of up to 250Msps while consuming only 477mW.

At 250Msps and an input frequency of 100MHz, the MAX1121 achieves a spurious-free dynamic range (SFDR) of 68dBc. Its excellent signal-to-noise ratio (SNR) of 48.9dB at 10MHz remains flat (within 0.5dB) for input tones up to 500MHz. This makes the MAX1121 ideal for wideband applications such as digital predistortion in cellular base-station transceiver systems.
SociétéMaxim Integrated Products
DatasheetTélécharger MAX1121 datasheet
 
 
  • Description courte

  • 8-Bit, 250Msps Analog-to-Digital Converter with LVDS Outputs for Wideband Applications

    The is a monolithic 8-bit, 250Msps analog-todigital converter (ADC) optimized for outstanding dynamic performance at high IF frequencies to 500MHz. The product operates with conversion rates to 250Msps while consuming only At 250Msps and an input frequency of 100MHz, the MAX1121 achieves a spurious-free dynamic range (SFDR) of 68dBc. Its excellent signal-to-noise ratio (SNR) at 10MHz remains flat (within 0.5dB) for input tones to 500MHz. This makes the MAX1121 ideal for wideband applications such as digital predistortion in cellular base-station transceiver systems. The MAX1121 requires a single 1.8V supply. The analog input is designed for either differential or singleended operation and can be AC- or DC-coupled. The ADC also features a selectable on-chip divide-by-2 clock circuit, which allows the user to apply clock frequencies as high as 500MHz. This helps to reduce the phase noise of the input clock source. A differential LVDS sampling clock is recommended for best performance. The converter's digital outputs are LVDS compatible, and the data format can be selected to be either two's complement or offset binary. The MAX1121 is available a 68-pin QFN with exposed pad (EP) and is specified over the industrial to +85°C) temperature range. For pin-compatible, higher resolution versions of the MAX1121, refer to the MAX1122 (170Msps), the MAX1123 (210Msps), and the MAX1124 (250Msps) data sheets. 250Msps Conversion Rate SNR 48.8dB/48.7dB at fIN = 100MHz/500MHz SFDR 68dBc/63.8dBc at fIN = 100MHz/500MHz Single 1.8V Supply 477mW Power Dissipation at 250Msps On-Chip Track-and-Hold and Internal Reference On-Chip Selectable Divide-by-2 Clock Input LVDS Digital Outputs with Data Clock Output Evaluation Kit Available (Order MAX1124EVKIT)

    Features
    D2N 45 OGND 44 OVCC 43 DCLKP 42 DCLKN 41 OVCC D0N 36 N.C. 35 N.C.
    Applications

    Wireless and Wired Broadband Communication Digital Oscilloscopes Digital Predistortion Receivers Communications Test Equipment Radar and Satellite Subsystems Antenna Array Processing Instrumentation

    AVCC AGND REFIO REFADJ AGND AVCC AGND INP INN
    AGND 10 AVCC 11 AVCC 12 AVCC 13 AVCC 14 AGND 15 AGND 16 CLKDIV 17

    For pricing, delivery, and ordering information, please contact Maxim Direct 1-888-629-4642, or visit Maxim's website at www.maxim-ic.com.

    8-Bit, 250Msps Analog-to-Digital Converter with LVDS Outputs for Wideband Applications MAX1121

    AVCC to +2.1V OVCC to +2.1V AVCC to +2.1V AGND to +0.3V Analog Inputs AGND...........................-0.3V to (AVCC + 0.3V) Digital Inputs AGND.............................-0.3V to (AVCC + 0.3V) REF, REFADJ AGND............................-0.3V to (AVCC + 0.3V) Digital Outputs OGND.........................-0.3V to (OVCC + 0.3V) ESD on All Pins (Human Body Model).............................±2000V Continuous Power Dissipation (TA +70°C) 68-Pin QFN (derate 41.7mW/°C above +70°C).........3333mW Operating Temperature to +85°C Junction Temperature......................................................+150°C Storage Temperature to +150°C Lead Temperature (soldering, 10s).................................+300°C Maximum Current into Any Pin............................................50mA

    Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.

    (AVCC = OVCC = 1.8V, VAGND = VOGND = 0, fSAMPLE = 250MHz, differential sine-wave clock input drive, 0.1µF capacitor on REFIO, internal reference, digital output pins differential TA = TMIN to TMAX, unless otherwise noted. +25°C guaranteed by production test, < +25°C guaranteed by design and characterization. Typical values are = +25°C.)

    PARAMETER DC ACCURACY Resolution Integral Nonlinearity Differential Nonlinearity Transfer Curve Offset Temperature Drift ANALOG INPUTS (INP, INN) Full-Scale Input Voltage Range Full-Scale Range Temperature Drift Common-Mode Input Range Input Capacitance Differential Input Resistance Full-Power Analog Bandwidth REFERENCE (REFIO, REFADJ) Reference Output Voltage Reference Temperature Drift REFADJ Input High Voltage SAMPLING CHARACTERISTICS Maximum Sampling Rate Minimum Sampling Rate f SAMPLE f SAMPLE 250 20 MHz VREFADJ Used to disable the internal reference AVCC 0.3 VREFIO V ppm/°C V VCM CIN RIN FPBW Figure 8 3.00 VFS (Note mVP-P ppm/°C pF k MHz INL DNL VOS (Note 1) No missing codes (Note 1) (Note Bits LSB V/°C SYMBOL CONDITIONS MIN TYP MAX UNITS

    8-Bit, 250Msps Analog-to-Digital Converter with LVDS Outputs for Wideband Applications

    (AVCC = OVCC = 1.8V, VAGND = VOGND = 0, fSAMPLE = 250MHz, differential sine-wave clock input drive, 0.1µF capacitor on REFIO, internal reference, digital output pins differential TA = TMIN to TMAX, unless otherwise noted. +25°C guaranteed by production test, < +25°C guaranteed by design and characterization. Typical values are = +25°C.)

    PARAMETER Clock Duty Cycle Aperture Delay Aperture Jitter CLOCK INPUTS (CLKP, CLKN) Differential Clock Input Clock Input Common-Mode Voltage Range Clock Differential Input Resistance Clock Differential Input Capacitance RCLK CCLK (Note mVP-P k pF tAD tAJ SYMBOL CONDITIONS Set by clock management circuit MIN TYP 350 0.2 MAX UNITS % ps psRMS

    DYNAMIC CHARACTERISTICS (at TA +25°C Signal-to-Noise Ratio SNR = 500MHz Signal-to-Noise and Distortion TA +25°C Spurious-Free Dynamic Range SFDR = 10MHz Worst Harmonics = 500MHz Two-Tone Intermodulation Distortion at -7dBFS dBc -56 dBc dB

    LVDS DIGITAL OUTPUTS (D0P/N­D7P/N, ORP/N) Differential Output Voltage 450 mV