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Numéro de sérieAD1937
CategorieMultimedia => Audio => Codecs
DescriptionFour ADCs/Eight DACs With PLL, 192 KHz, 24-Bit Codec
The AD1937 is a high performance, single-chip codec that provides four analog-to-digital converters (ADCs) with differential input and eight digital-to-analog converters (DACs) with differential output, using the Analog Devices, Inc., patented multibit sigma-delta (?-?) architecture. An I2C® port is included, allowing a microcontroller to adjust volume and many other parameters. The AD1937 operates from 3.3 V digital and analog supplies. The AD1937 is available in a 64-lead (differential output) LQFP.
SociétéAnalog Devices
DatasheetTélécharger AD1937 datasheet
 
 
  • Description courte
  • Four ADCs/Eight DACs with PLL, 192 kHz, 24-Bit Codec AD1937
    FEATURES

    PLL-generated clock or direct master clock Low EMI design DAC/107 dB ADC dynamic range and SNR -96 dB THD + N Single 3.3 V supply Tolerance for 5 V logic inputs Supports 24-bits and 8 kHz to 192 kHz sample rates Differential ADC input Differential DAC output Log volume control with autoramp function I2C-controllable for flexibility Software-controllable clickless mute Software power-down Right-justified, left-justified, I2S, and TDM modes Master and slave modes to 16-channel input/output Available a 64-lead LQFP AECQ-100 qualified

    The is a high performance, single-chip codec that provides four analog-to-digital converters (ADCs) with differential input and eight digital-to-analog converters (DACs) with differential output, using the Analog Devices, Inc., patented multibit sigmadelta architecture. An I2C® port is included, allowing a microcontroller to adjust volume and many other parameters. The AD1937 operates from 3.3 V digital and analog supplies. The AD1937 is available a 64-lead (differential output) LQFP. The AD1937 is designed for low EMI. This consideration is apparent in both the system and circuit design architectures. By using the on-board PLL to derive the master clock from the LR (frame) clock or from an external crystal, the AD1937 eliminates the need for a separate high frequency master clock and can also be used with a suppressed bit clock. The DACs and ADCs are designed using the latest Analog Devices continuous time architecture to further minimize EMI. By using 3.3 V supplies, power consumption is minimized and further reduces emissions.

    APPLICATIONS
    Automotive audio systems Home theater systems Set-top boxes Digital audio effects processors

    SERIAL DATA PORT DAC ADC ANALOG AUDIO INPUTS ADC DIGITAL FILTER SDATA OUT SDATA IN CLOCKS TIMING MANAGEMENT AND CONTROL (CLOCK AND PLL) DAC DIGITAL FILTER AND VOLUME CONTROL DAC PRECISION VOLTAGE REFERENCE I2C CONTROL PORT ANALOG AUDIO OUTPUTS

    Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners.

    One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 ©2008 Analog Devices, Inc. All rights reserved.

    Features.............................................................................................. 1 Applications....................................................................................... 1 General Description......................................................................... 1 Functional Block Diagram.............................................................. 1 Revision History............................................................................... 2 Specifications..................................................................................... 3 Test Conditions............................................................................. 3 Analog Performance Specifications........................................... 3 Crystal Oscillator Specifications................................................. 5 Digital Specifications................................................................... 6 Power Supply Specifications........................................................ 6 Digital Filters................................................................................. 7 Timing Specifications.................................................................. 8 Timing Diagrams.......................................................................... 9 Absolute Maximum Ratings.......................................................... 10 Thermal Resistance.................................................................... 10 ESD Caution................................................................................ 10 Pin Configuration and Function Descriptions........................... 11 Typical Performance Characteristics........................................... 13 Theory of Operation...................................................................... 15 Analog-to-Digital Converters (ADCs).................................... 15 Digital-to-Analog Converters (DACs).................................... 15 Clock Signals............................................................................... 15 Reset and Power-Down............................................................. 16 I2C Control Port.......................................................................... 16 Power Supply and Voltage Reference....................................... 18 Serial Data Ports--Data Format............................................... 19 Time-Division Multiplexed (TDM) Modes............................ 20 Daisy-Chain Mode..................................................................... 23 Additional Modes....................................................................... 26 Control Registers............................................................................ 27 Definitions................................................................................... 27 PLL and Clock Control Registers............................................. 27 DAC Control Registers.............................................................. 28 ADC Control Registers.............................................................. 30 Applications Circuits...................................................................... 32 Outline Dimensions....................................................................... 33 Ordering Guide.......................................................................... 33

    Performance of all channels is identical, exclusive of the interchannel gain mismatch and interchannel phase deviation specifications. Table 1.

    Parameter Supply Voltages (AVDD, DVDD) Temperature Master Clock Input Sample Rate Measurement Bandwidth Word Width Load Capacitance (Digital Output) Load Current (Digital Output) Input Voltage High Input Voltage Low Value V As specified in Table 2 and Table 3 12.288 MHz (48 kHz fS, × fS mode) 48 kHz to 20 kHz 24 bits to ½ DVDD supply 0.8 V

    Parameter ANALOG-TO-DIGITAL CONVERTERS ADC Resolution Dynamic Range No Filter (RMS) With A-Weighted Filter (RMS) Total Harmonic Distortion + Noise Full-Scale Input Voltage (Differential) Gain Error Interchannel Gain Mismatch Offset Error Gain Drift Interchannel Isolation CMRR Input Resistance Input Capacitance Input Common-Mode Bias Voltage DIGITAL-TO-ANALOG CONVERTERS DAC Resolution Dynamic Range No Filter (RMS) With A-Weighted Filter (RMS) With A-Weighted Filter (Average) Conditions/Comments All ADCs to 20 kHz, -60 dB input 98 -1 dBFS -0.25 -10 Min Typ Max Unit Bits dB V rms dB mV ppm/°C pF V Bits dB