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Numéro de sérieFDPF12N50FT
CategorieDiscrete => Transistors => FETs (Field Effect Transistors) => MOSFETs => N-Channel
Description500V N-Channel MOSFET
These N-Channel enhancement mode power field effect transistors are produced using Fairchild\'s proprietary, planar stripe, DMOS technology.

This advance technology has been especially tailored to minimize on-state resistance, provide superior switching performance, and withstand high energy pulse in the avalanche and commutation mode. These devices are well suited for high efficient switching mode power supplies and active power factor correction.
SociétéFairchild Semiconductor
DatasheetTélécharger FDPF12N50FT datasheet
 
 
  • Description courte

  • · RDS(on) 0.59 ( Typ.)@ VGS = 6A· Low gate charge ( Typ. 21nC)· Low Crss ( Typ. 11pF)· Fast switching· 100% avalanche tested· Improve dv/dt capability· RoHS compliant

    Description

    These N-Channel enhancement mode power field effect transistors are produced using Fairchild's proprietary, planar stripe, DMOS technology. This advance technology has been especially tailored to minimize on-state resistance, provide superior switching performance, and withstand high energy pulse in the avalanche and commutation mode. These devices are well suited for high efficient switching mode power supplies and active power factor correction.

    MOSFET Maximum Ratings = 25oC unless otherwise noted

    Symbol VDSS VGSS ID IDM EAS IAR EAR dv/dt PD TJ, TSTG TL Parameter Drain to Source Voltage Gate to Source Voltage Drain Current Drain Current Single Pulsed Avalanche Energy Avalanche Current Repetitive Avalanche Energy Peak Diode Recovery dv/dt Power Dissipation (TC 25oC) - Derate above 25oC -Continuous (TC = 25oC) -Continuous (TC 100oC) - Pulsed (Note 1) (Note 2) (Note 1) (Note 1) (Note FDP12N50F FDPF12N50FT Units A mJ V/ns W W/oC

    Operating and Storage Temperature Range Maximum Lead Temperature for Soldering Purpose, 1/8" from Case for 5 Seconds

    *Drain current limited by maximum junction temperature

    Symbol RJC RCS RJA Parameter Thermal Resistance, Junction to Case Thermal Resistance, Case to Sink Typ. Thermal Resistance, Junction to Ambient FDP12N50F FDPF12N50FT

    Package Marking and Ordering Information = 25oC unless otherwise noted

    Device Marking FDP12N50F FDPF12N50FT Device FDP12N50F FDPF12N50FT Package TO-220 TO-220F Reel Size Tape Width Quantity 50

    Symbol Parameter Test Conditions Min. Typ. Max. Units

    BVDSS / TJ IDSS IGSS Drain to Source Breakdown Voltage Breakdown Voltage Temperature Coefficient Zero Gate Voltage Drain Current Gate to Body Leakage Current = 250µA, VGS = 250µA, Referenced to VDS = 500V, VGS = 0V VDS = 125oC VGS = ±30V, VDS 25oC V V/oC µA nA

    VGS(th) RDS(on) gFS Gate Threshold Voltage Static Drain to Source On Resistance Forward Transconductance VGS = VDS, = 250µA VGS = 6A VDS = 6A

    Ciss Coss Crss Qg(tot) Qgs Qgd Input Capacitance Output Capacitance Reverse Transfer Capacitance Total Gate Charge at 10V Gate to Source Gate Charge Gate to Drain "Miller" Charge VDS = 11.5A VGS = 10V

    td(on) tr td(off) tf Turn-On Delay Time Turn-On Rise Time Turn-Off Delay Time Turn-Off Fall Time VDD = 25

    IS ISM VSD trr Qrr Maximum Continuous Drain to Source Diode Forward Current Maximum Pulsed Drain to Source Diode Forward Current Drain to Source Diode Forward Voltage Reverse Recovery Time Reverse Recovery Charge VGS = 0V, ISD = 11.5A VGS = 0V, ISD = 11.5A dIF/dt = 100A/µs

    Notes: 1. Repetitive Rating: Pulse width limited by maximum junction temperature = 6.9mH, IAS = 11.5A, VDD = 25, Starting 25°C 3. ISD 11.5A, di/dt 200A/µs, VDD BVDSS, Starting 25°C 4. Pulse Test: Pulse width 300µs, Duty Cycle 2% 5. Essentially Independent of Operating Temperature Typical Characteristics

    Figure 3. On-Resistance Variation vs. Drain Current and Gate Voltage
    Figure 4. Body Diode Forward Voltage Variation vs. Source Current and Temperature