|Numéro de série||FDMF6730|
|Categorie||Discrete => Transistors => FETs (Field Effect Transistors) => MOSFETs => Power MOSFETs|
|Description||Driver Plus FET Multi-chip Module
The FDMF6730 is a high efficiency Driver plus MOSFET power stage solution optimized for Ultra Mobile PC (UMPC) system power voltage supplies. It is fully compliant with the Intel Ultra- Mobile Driver MOS (uDrMOS) Specification. The MOSFETs and driver have been optimized to perform with high efficiency at light and medium loads, ideal for compact PC devices.
|Datasheet||Télécharger FDMF6730 datasheet|
Over 95% efficiency Internal 5V regulator for gate drive 6V-16V input range 1MHz max operating frequency SMOD operation capability for light load efficiency 5A current capability (10A with PASS FET) Current limit set by RDSON sensing to minimize power losses Integrated bootstrap diode
The is a high efficiency Driver plus MOSFET power stage solution optimized for Ultra Mobile PC (UMPC) system power voltage supplies. It is fully compliant with the Intel UltraMobile Driver MOS (uDrMOS) Specification. The MOSFETs and driver have been optimized to perform with high efficiency at light and medium loads, ideal for compact PC devices. The internal driver IC integrates two highly efficient LDOs for internal gate-drive and external circuitry. The bootstrap diode is also integrated within the IC. When operating with a single low side MOSFET the uDrMOS module is capable of delivering 5A of continuous current. The PASS transistor may be easily routed in parallel with the low side MOSFET to provide to 10A. The module also incorporates an over current protection flag from an RDSON current sense architecture. The device comes a 6X6 Power QFN package for improved thermal performance.Applications
DRIVE LS CS_O UT CGND D_PASS CS_PROG S_PASS
PGND 40 PGND LDRV VSWH D_PASS G_PASS S_PASS 31 D (D_PASS) C (CGND) A (VSWH) B (VIN)
30 VCC CGND NC DRIVE_HS D_PASS CS_PROG S_PASS DRIVE_LS CS_OUT
PGND VSWH VIN HDRV CGND PHASE BOOT LDO_5V LDO_OUT LDO_ADJ LDO_EN DRIVE_LS DRIVE_HS VCC CS_OUT CS_PROG D_PASS NC S_PASS G_PASS LDRV
Low Side FET Source Pin. Connect to GND Switch Node Pin. Low Side FET Drain pin. Electrically shorted to PHASE pin Input Voltage Pin. Input voltage for buck converter HDRV pin. High Side driver output. Connected to High Side FET gate pin. IC Ground. Ground return for driver IC. Switch Node Pin for easy bootstrap capacitor routing. Electrically shorted to VSWH pin. Bootstrap Supply Input Pin. Provides voltage supply to high-side MOSFET driver. Connect bootstrap capacitor. 5V Internal LDO Output. Adjustable LDO Output. LDO Adjust Input. Connect to external voltage divider to adjust LDO output. Adjustable LDO Enable Pin. 1 = Enable, 0 = Disable Low Side PWM Input. Connect to PWM controller. High Side PWM Input. Connect to PWM controller. Driver VCC. Connect to 5V. Current Sense Output. 1 = Over-current Fault, = No Fault. Current Sense Program. Pass FET Drain Pin. Connect to VSWH pad for higher output current. No Connect. This pin must be floated. Must not be connected to any pin. Pass FET Source Pin. Connect to PGND pad for higher output current. Pass FET Gate Pin. Connect to LDRV pin for higher output current. LDRV pin. Low Side driver output. Connect to G_PASS pin for higher output current.
Stresses exceeding the absolute maximum rating may damage the device. The device may not function or be operable above the recommended operating conditions and stressing these parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect the device reliability. The absolute maximum rating are stress ratings only.
VCC, Drive_LS, Drive_HS, LDO_EN, CS_Prog, CS_Out to GND VIN to PGND BOOT to VSWH to PGND BOOT to PGND IO(AV) IO(PK) RJPCB PT VIN = 3.3V, fSW = 1MHz, TPCB = 130°C VIN = 8.4V, tPULSE 10 s Junction to PCB Thermal Resistance note 1. TPCB =130° C
Note 1: Package power dissipation based on 4 layer, 2 square inch, 2 oz. copper pad. RJPCB is the steady state junction to PCB thermal resistance with PCB temperature referenced at VSWH pin.