|Numéro de série||ISL95811|
|Categorie||Analog & Mixed-Signal Processing => Potentiometers => Digital Potentiometers|
|Description||Single Digitally Controlled Potentiomete
The ISL95811 integrates a digitally controlled potentiometer (XDCP) and non-volatile memory on a monolithic CMOS integrated circuit.
The digitally controlled potentiometer is implemented with a combination of resistor elements and CMOS switches. The position of the wiper is controlled by the user through the I2C bus interface. The potentiometer has an associated volatile Wiper Register (WR) and a non-volatile Initial Value Register (IVR), that can be directly written to and read by the user. The content of the WR controls the position of the wiper. At power-up the device recalls the contents of the DCP’s IVR to the WR.
|Datasheet||Télécharger ISL95811 datasheet|
I2C Bus, 256 Taps, 5 Bytes General Purpose Memory, Low Noise, Low Power
The ISL95811 integrates a digitally controlled potentiometer (XDCP) and non-volatile memory on a monolithic CMOS integrated circuit. The digitally controlled potentiometer is implemented with a combination of resistor elements and CMOS switches. The position of the wiper is controlled by the user through the I2C bus interface. The potentiometer has an associated volatile Wiper Register (WR) and a non-volatile Initial Value Register (IVR), that can be directly written to and read by the user. The content of the WR controls the position of the wiper. At power-up the device recalls the contents of the DCP's IVR to the WR. The DCP can be used as three-terminal potentiometer or as two-terminal variable resistor in a wide variety of applications including control, parameter adjustments and signal processing.Features
· 256 Resistor Taps - 0.4% Resolution· I2C Serial Interface· 5 General Purpose Non-Volatile Bytes· Non-volatile Storage of Wiper Position· Write Protection· Wiper Resistance: 70 Typical @ VCC = 3.3V· Standby Current 10µA Max· Power Supply: 50k, 10k Total Resistance· High Reliability - Endurance: 1,000,000 Data Changes per Bit per Register - Register Data Retention: 50 Years 8 Ld MSOP and 8 Ld TDFN Packaging· Pb-Free (RoHS compliant)
PART NUMBER (Note) ISL95811UFUZ* ISL95811UFRTZ* PART MARKING 5811U 811U RTOTAL (k) TEMP. RANGE (°C) to +125 PACKAGE (Pb-Free) 8 Ld MSOP Ld 3x3 TDFN 8 Ld MSOP Ld 3x3 TDFN PKG. DWG. MDP0043 L8.3x3A
*Add "-TK" suffix for tape and reel. Please refer to TB347 for details on reel specifications NOTE: These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100% matte tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations). Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc. XDCP is a trademark of Intersil Corporation. Copyright Intersil Americas Inc. 2008. All Rights Reserved All other trademarks mentioned are the property of their respective owners.
MSOP PIN NUMBER TDFN PIN NUMBER SYMBOL WP SCL SDA GND RL RH VCC EPAD* DESCRIPTION Hardware write protection. Active low. Prevents any "Write" operation of the I2C interface. I2C interface input clock Open Drain Serial Data I/O for the I2C interface Ground "Wiper" terminal of the DCP "Low" terminal of the DCP "High" terminal of the DCP Power supply Exposed Die Pad internally connected to GND
*NOTE: PCB thermal land for QFN/TDFN EPAD should be connected to GND plane or left floating. For more information refer to http://www.intersil.com/data/tb/TB389.pdf.
Voltage at any Digital Interface Pin with respect to GND. -0.3V to VCC + 0.3V VCC. to +6.0V Voltage at any DCP Pin with respect GND.0V to VCC (10s). ±6mA ESD Rating Human Body Model.3kV
Thermal Resistance (Typical) JA (°C/W) JC (°C/W) 8 Ld TDFN (Notes Ld MSOP (Note 1). 160 N/A Maximum Junction Temperature (Plastic Package). +150°C Storage to +150°C Latchup (Note 3). Class II, Level @ +125°C Pb-Free Reflow Profile.see link below http://www.intersil.com/pbfree/Pb-FreeReflow.aspTemperature Range (Extended to +125°C VCC. to 5.5V Power Rating.15mW Wiper Current. ±3.0mA
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and result in failures not covered by warranty.
NOTES: JA is measured with the component mounted on a high effective thermal conductivity test board in free air. See Tech Brief TB379 for details. 2. For JC, the "case temp" location is the center of the exposed metal pad on the package underside. 3. Jedec Class II pulse conditions and failure criterion used. Level B exceptions is using a max positive pulse 6.5V on the WP pin.
Over recommended operating conditions unless otherwise stated. PARAMETER TEST CONDITIONS RTOTAL = (VRH - VRL)/IDCP W option U option MIN (Note 18) TYP (Note VCC @ +25°C Wiper current = VCC/RTOTAL Wiper at the middle scale, 1kHz 1VRMS input to RH pin -110 10/10/25 Voltage at pin from GND to VCC MAX (Note 18) UNIT k % dBV pF µA
to RL Resistance Tolerance RW RWnoise (Note 16) CH/CL/CW (Note 16) ILkgDCP Wiper Resistance Noise Level Potentiometer Capacitance Leakage on DCP Pins
VOLTAGE DIVIDER MODE (0V @ RL; VCC @ RH; measured at RW, unloaded) INL (Note 9) Integral Non-Linearity DCP register set between 1 hex and FFhex. Monotonic over all tap positions. W and U options DCP register set between 1 hex and FF hex. Monotonic over all tap positions W option U option FSerror (Note 7) Full-Scale Error W option U option TCV (Note 10, 16) fCUTOFF (Note 16) Ratiometric Temperature Coefficient 3dB Cut-Off Frequency DCP Register set to 80 hex Wiper at the middle scale W option U option W option U option -1 1 LSB (Note 5) LSB (Note 5) LSB (Note 5) LSB (Note 5) ppm/°C kHz