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Numéro de sérieST7MC1K2
CategorieMicrocontrollers => 8 bit
DescriptionST7 - 8-bit Microcontrollers
8-bit MCU with nested interrupts, Flash, 10-bit ADC, brushless motor control, five timers, SPI, LINSCI\"
SociétéST Microelectronics, Inc.
DatasheetTélécharger ST7MC1K2 datasheet
 
 
  • Description courte
  • 8-bit MCU with nested interrupts, Flash, 10-bit ADC, brushless motor control, five timers, SPI, LINSCITM

    Features

    Memories to 60K dual voltage FLASH Program memory or ROM with read-out protection capability, In-Application Programming and In-Circuit Programming. to 1.5K RAM ­ HDFlash endurance: 100 cycles, data retention: 40 years at 85°C Clock, reset and supply management ­ Enhanced reset system ­ Enhanced low voltage supervisor (LVD) for main supply and auxiliary voltage detector (AVD) with interrupt capability ­ Clock sources: crystal/ceramic resonator oscillators and by-pass for external clock, clock security system. ­ Four power saving modes: Halt, Active-Halt, Wait and Slow Interrupt management ­ Nested interrupt controller ­ 14 interrupt vectors plus TRAP and RESET ­ MCES top level interrupt pin ­ 16 external interrupt lines (on 3 vectors) to 60 I/O ports to 60 multifunctional bidirectional I/O lines to 41 alternate function lines to 12 high sink outputs 5 timers ­ Main Clock Controller with: Real time base, Beep and Clock-out capabilities ­ Configurable window watchdog timer ­ Two 16-bit timers with: 2 input captures, 2 output compares, external clock input, PWM and pulse generator modes ­ 8-bit PWM Auto-Reload timer with: 2 input captures, 4 PWM outputs, output compare and time base interrupt, external clock with Table 1. Device summary

    event detector 2 Communication interfaces ­ SPI synchronous serial interface ­ LINSCITM asynchronous serial interface Brushless motor control peripheral ­ 6 high sink PWM output channels for sinewave or trapezoidal inverter control ­ Motor safety including asynchronous emergency stop and write-once registers ­ 4 analog inputs for rotor position detection (sensorless/hall/tacho/encoder) ­ Permanent magnet motor coprocessor including multiplier, programmable filters, blanking windows and event counters ­ Operational amplifier and comparator for current/voltage mode regulation and limitation Analog peripheral ­ 10-bit ADC with 16 input pins In-circuit Debug Instruction set ­ 8-bit Data Manipulation ­ 63 Basic Instructions with illegal opcode detection ­ 17 main Addressing Modes Unsigned Multiply Instruction ­ True Bit Manipulation Development tools ­ Full hardware/software development package

    Program memory - bytes RAM (stack) - bytes Peripherals Operating Supply vs. Frequency

    48K 60K Watchdog, 16-bit Timer A, LINSCITM, 10-bit ADC, MTC, 8-bit PWM ART, ICD SPI, 16-bit Timer to 5.5V with +125°C LQFP44

    to +125°C Package LQFP32 Note 1: For development only. No production Temperature Range

    1 INTRODUCTION. 5 2 PIN DESCRIPTION. 6 3 REGISTER & MEMORY MAP. 17 4 FLASH PROGRAM MEMORY. 22 4.1 INTRODUCTION. MAIN FEATURES. 22 STRUCTURE. 22 ICC INTERFACE. 23 ICP (IN-CIRCUIT PROGRAMMING). 24 IAP (IN-APPLICATION PROGRAMMING). 24 RELATED DOCUMENTATION. 24 REGISTER DESCRIPTION. 24

    5 CENTRAL PROCESSING UNIT. 25 5.1 INTRODUCTION. 5.2 5.3 MAIN FEATURES. 25 CPU REGISTERS. 25

    6 SUPPLY, RESET AND CLOCK MANAGEMENT. 28 6.1 OSCILLATOR. RESET SEQUENCE MANAGER (RSM). 30 SYSTEM INTEGRITY MANAGEMENT (SI). 32 MAIN CLOCK CONTROLLER WITH REAL TIME CLOCK AND BEEPER (MCC/RTC). 37

    7 INTERRUPTS. 40 7.1 INTRODUCTION. MASKING AND PROCESSING FLOW. 40 INTERRUPTS AND LOW POWER MODES. 42 CONCURRENT & NESTED MANAGEMENT. 42 INTERRUPT REGISTER DESCRIPTION. 43 EXTERNAL INTERRUPTS. 45 EXTERNAL INTERRUPT CONTROL REGISTER (EICR). 47

    8 POWER SAVING MODES. 50 8.1 INTRODUCTION. SLOW MODE. 50 WAIT MODE. 51 ACTIVE-HALT AND HALT MODES. 52

    9 I/O PORTS. 54 9.1 INTRODUCTION. FUNCTIONAL DESCRIPTION. 54 I/O PORT IMPLEMENTATION. 57 LOW POWER MODES. 57

    INTERRUPTS. 309 10 ON-CHIP PERIPHERALS. 60 10.1 WINDOW WATCHDOG (WWDG). 60

    10.2 PWM AUTO-RELOAD TIMER (ART). 10.3 16-BIT TIMER. 76 10.4 SERIAL PERIPHERAL INTERFACE (SPI). 95 10.5 LINSCI SERIAL COMMUNICATION INTERFACE (LIN MASTER/SLAVE). 107 10.6 MOTOR CONTROLLER (MTC). 138 10.7 OPERATIONAL AMPLIFIER (OA). 10.8 10-BIT A/D CONVERTER (ADC). 236 11 INSTRUCTION SET. 241 11.1 CPU ADDRESSING MODES. 241 11.2 INSTRUCTION GROUPS. 244 12 ELECTRICAL CHARACTERISTICS. 247 12.1 PARAMETER CONDITIONS. 247 12.2 ABSOLUTE MAXIMUM RATINGS. 248 12.3 OPERATING CONDITIONS. 250 12.4 SUPPLY CURRENT CHARACTERISTICS. 252 12.5 CLOCK AND TIMING CHARACTERISTICS. 256 12.6 MEMORY CHARACTERISTICS. 260 12.7 EMC CHARACTERISTICS. 261 12.8 I/O PORT PIN CHARACTERISTICS. 264 12.9 CONTROL PIN CHARACTERISTICS. 267 12.10 TIMER PERIPHERAL CHARACTERISTICS. 270 12.11 COMMUNICATION INTERFACE CHARACTERISTICS. 271 12.12 MOTOR CONTROL CHARACTERISTICS. 273 12.13 OPERATIONAL AMPLIFIER CHARACTERISTICS. 12.14 10-BIT ADC CHARACTERISTICS. 281 13 PACKAGE CHARACTERISTICS. 285 13.1 PACKAGE MECHANICAL DATA. 285 13.2 THERMAL CHARACTERISTICS. 288 13.3 SOLDERING INFORMATION. 14 ST7MC DEVICE CONFIGURATION AND ORDERING INFORMATION. 290 14.1 FLASH OPTION BYTES. 290 14.2 DEVICE ORDERING INFORMATION AND TRANSFER OF CUSTOMER CODE. 292 14.3 DEVELOPMENT TOOLS. 14.4 ST7 APPLICATION NOTES. 296 15 IMPORTANT NOTES. 299 15.1 FLASH/FASTROM DEVICES ONLY. 299 15.2 CLEARING ACTIVE INTERRUPTS OUTSIDE INTERRUPT ROUTINE. 300 15.3 TIMD SET SIMULTANEOUSLY WITH OC INTERRUPT. 300 15.4 LINSCI LIMITATIONS. 300 15.5 MISSING DETECTION OF BLDC "Z EVENT". 303 15.6 INJECTED CURRENT PD7. 303