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Numéro de sérieL6926
CategoriePower Management => DC-DC Converters
DescriptionDC-DC Conversion
High efficiency monolithic synchronous step down regulator
SociétéST Microelectronics, Inc.
DatasheetTélécharger L6926 datasheet
  • Description courte
  • High efficiency monolithic synchronous step down regulator

    5.5 V battery input range High efficiency: 95 % Internal synchronous switch No external schottky required Extremely low quiescent current 1 mA max shutdown supply current 800 mA max output current Adjustable output voltage from 0.6 V Low drop-out operation: 100 % duty cycle Selectable low noise/low consumption mode at light load Power good signal ±1 % output voltage accuracy Current-mode control 600 kHz switching frequency Externally synchronizable from 500 kHz to 1.4 MHz OVP Short circuit protection


    The device is DC-DC monolithic regulator specifically designed to provide extremely high efficiency. L6926 supply voltage can be as low 2 V allowing its use in single Li-ion cell supplied applications. Output voltage can be selected by an external divider down 0.6 V. Duty cycle can saturate 100 % allowing low drop-out operation. The device is based a 600 kHz fixedfrequency, current mode-architecture. Low consumption mode operation can be selected at light load conditions, allowing switching losses to be reduced. L6926 is externally synchronizable with a clock which makes it useful in noise-sensitive applications. Other features like powergood, overvoltage protection, shortcircuit protection and thermal shutdown (150 °C) are also present.


    Battery-powered equipments Portable instruments Cellular phones PDAs and hand held terminals DSC Application test circuit

    Short circuit protection. 9 Slope compensation. 10 Loop stability. 10

    DROPOUT operation. 11 PGOOD (power good output). 11 Adjustable output voltage. 11 OVP (overvoltage protection). 11 Thermal shutdown. 11

    Package mechanical data. 12 Order codes. 14 Revision history. 15

    Name RUN COMP VFB GND LX Description Shutdown input. When connected to a low level (lower than 0.4 V) the device stops working. When high (higher than 1.3 V) the device is enabled. Error amplifier output. A compensation network has to be connected to this pin. Usually 220 pF capacitor is enough to guarantee the loop stability. Error amplifier inverting input. The output voltage can be adjusted from up to the input voltage by connecting this pin to an external resistor divider. Ground. Switch output node. This pin is internally connected to the drain of the internal switches. Input voltage. The start up input voltage 2.2 V (typ) while the operating input voltage range is from V. An internal UVLO circuit realizes 100 mV (typ.) hysteresis. Operating mode selector input. When high (higher than 1.3 V) the Low Consumption Mode is selected. When low (lower than 0.5 V) the low noise mode is selected. If connected with an appropriate external synchronization signal (from 500 kHz to 1.4 MHz) the internal synchronization circuit is activated and the device works at the same switching frequency.

    Power good comparator output. is an open drain output. A pull-up resistor should be connected between PGOOD and VOUT (or VCC depending on the PGOOD requirements). The pin is forced low when the output voltage is lower than 90% of the regulated output voltage and goes high when the output voltage is greater than 90% of the regulated output voltage. If not used the pin can be left floating.