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Publications dans les journaux scientifiques dans le domaine de l'ingénierie : 01-2017 trié par par titre, page: 0
» $mathsf{REboost}$ : Improving Throughput in Wireless Networks Using Redundancy Elimination
Résumé:
Traffic redundancy elimination (RE) is an attractive approach to improve the throughput in bandwidth-limited networks. While previous studies show that the RE is useful for improving the throughput in such networks, we observed that the RE would not be an effective solution in wireless networks. We found the TCP congestion control cannot take advantage of the RE, without knowing how the underlying RE system manipulates each TCP packet. In this letter, we present a novel technique called REboost to enable the TCP layer to be aware of the underlying RE system and improve the throughput. Our evaluation with a prototype shows that REboost significantly improves the throughput compared with the previous RE systems.
Auteurs: Kilho Lee;Daehyeok Kim;Insik Shin;
Apparue dans: IEEE Communications Letters
Date publication: 01.-2017, volume: 21, issue:1, pages: 160 - 163
Editeur: IEEE
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» $Q$ Bounds for Planar and Ellipsoidal Antennas
Résumé:
The procedure for numerically deriving equivalent circuits for the six lowest-order modes of arbitrarily shaped, electrically small antennas is reviewed. Element values and the effective radius are tabulated for thin prisms, spheroids, and ellipsoids with a wide range of aspect ratios. A self-consistency test for the elements is defined and applied. These circuits allow calculation of the internal and external electric and magnetic reactive energies and thus establish lower bounds for Q of antennas with these shapes as a function of their electrical radius, ka. Electromagnetic simulations on a family of meander dipoles and a planar loop provide Q values that are compared with the bounds over a range of ka up to one.
Auteurs: Herbert L. Thal;
Apparue dans: IEEE Transactions on Antennas and Propagation
Date publication: 01.-2017, volume: 65, issue:1, pages: 353 - 358
Editeur: IEEE
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» $W$ -Band Traveling Wave Tube Amplifier Based on Planar Slow Wave Structure
Résumé:
A novel planar slow wave structure (SWS) for traveling wave tube (TWT) is proposed. The major advantage of the planar architecture is its easy realization with respect to the typical 3-D SWSs. The particle in cell simulations of the TWT show an achievable gain up to 36.4 dB and a maximum output power of 17.4 W for an operating frequency of 92 GHz. The planar structure can be realized using the standard photolithographic techniques, which improve the reproducibility and performance.
Auteurs: G. Ulisse;V. Krozer;
Apparue dans: IEEE Electron Device Letters
Date publication: 01.-2017, volume: 38, issue:1, pages: 126 - 129
Editeur: IEEE
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» “Driving”-Stress-Induced Degradation in Polycrystalline Silicon Thin-Film Transistors and Its Suppression by a Bridged-Grain Structure
Résumé:
In this letter, degradation of polycrystalline silicon (poly-Si) thin-film transistors (TFTs) under “driving” stress is characterized and analyzed for the first time. Dynamic hot carrier (HC) effect, related to pulse falling time, dominates device degradation. To suppress such “driving”-stress-induced dynamic HC degradation, a bridged-grain (BG) structure is applied to the active channel of poly-Si TFTs. Due to the lateral electric field reduction at source/drain junctions, “driving”-stress-induced dynamic HC degradation is significantly improved by the BG structure. Incorporated with transient simulations, the degradation mechanism is elucidated.
Auteurs: Meng Zhang;Wei Zhou;Rongsheng Chen;Man Wong;Hoi-Sing Kwok;
Apparue dans: IEEE Electron Device Letters
Date publication: 01.-2017, volume: 38, issue:1, pages: 52 - 55
Editeur: IEEE
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» 2.25- $mu$ m Avalanche Photodiodes Using Metamorphic Absorber and Lattice-Matched Multiplier on InP
Résumé:
A separated absorption and multiplication aval-anche photodiode for light detection to wavelengths as long as 2.25~\mu text{m} is reported. Photons were absorbed in a metamorphic In0.75Ga0.25As layer, while the photo-generated electrons were injected into a lattice-matched In0.52Al0.48As multiplier on InP. A responsivity gain of 2.7 was attained at 2 \mu text{m} at 250 K and increased to 20 at 77 K. A primary dark current of 2.2 \times 10^{-3} A/cm2 at −15 V was measured at 77 K, which is dominated by dislocation defect-assisted tunneling with activation energies between 0.1 and 0.2 eV. This letter demonstrates the potentiality of extending spectral range of avalanche photodiodes in metamorphic device architecture.
Auteurs: Y. J. Ma;Y. G. Zhang;Y. Gu;X. Y. Chen;Y. H. Shi;W. Y. Ji;S. P. Xi;B. Du;H. J. Tang;Y. F. Li;J. X. Fang;
Apparue dans: IEEE Photonics Technology Letters
Date publication: 01.-2017, volume: 29, issue:1, pages: 55 - 58
Editeur: IEEE
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» 2016 MTT-S Awards [Awards]
Résumé:
Presents the recipients of various MTTS society awards.
Auteurs: Charlie Jackson;
Apparue dans: IEEE Microwave Magazine
Date publication: 01.-2017, volume: 18, issue:1, pages: 114 - 131
Editeur: IEEE
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» 2017: The New Computer Society
Résumé:
Ensuring the continued success of our members is the driving force behind recent and future changes to the Society's lineup of products and services. As we grow and adapt to global changes, we look to the ideas and energy of our new and renewing members to help us meet the needs of the profession and the communities we serve.
Auteurs: Jean-Luc Gaudiot;
Apparue dans: Computer
Date publication: 01.-2017, volume: 50, issue:1, pages: 5 - 7
Editeur: IEEE
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» 256 Gb 3 b/Cell V-nand Flash Memory With 48 Stacked WL Layers
Résumé:
A 48 WL stacked 256-Gb V-NAND flash memory with a 3 b MLC technology is presented. Several vertical scale-down effects such as deteriorated WL loading and variations are discussed. To enhance performance, reverse read scheme and variable-pulse scheme are presented to cope with nonuniform WL characteristics. For improved performance, dual state machine architecture is proposed to achieve optimal timing for BL and WL, respectively. Also, to maintain robust IO driver strength against PVT variations, an embedded ZQ calibration technique with temperature compensation is introduced. The chip, fabricated in a third generation of V-NAND technology, achieved a density of 2.6 Gb/mm2 with 53.2 MB/s of program throughput.
Auteurs: Dongku Kang;Woopyo Jeong;Chulbum Kim;Doo-Hyun Kim;Yong Sung Cho;Kyung-Tae Kang;Jinho Ryu;Kyung-Min Kang;SungYeon Lee;Wandong Kim;Hanjun Lee;Jaedoeg Yu;Nayoung Choi;Dong-Su Jang;Cheon An Lee;Young-Sun Min;Moo-Sung Kim;An-Soo Park;Jae-Ick Son;In-Mo Kim
Apparue dans: IEEE Journal of Solid-State Circuits
Date publication: 01.-2017, volume: 52, issue:1, pages: 210 - 217
Editeur: IEEE
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» 3-D Mechanically Tunable Square Slot FSS
Résumé:
We introduce an innovative 3-D mechanically tunable frequency selective surface (FSS), which is inspired by the classical flat square slot FSS. The proposal improves the performance of classical 2-D FSS designs, and it also represents a novel method of achieving mechanical frequency tuning, despite other 3-D designs that consist of a collection of stacked 3-D layers exist. In our proposal, the rotation of an inner element provides tuning capability to the squared cell structure, consisting of metallic grids with a movable inner element. An aluminum prototype was built, which can be tuned from 2.4 to 4 GHz, and also compared its measured performance and numerical simulations. Some characteristics of the proposed structure are the rejection level at main polarization, up to 20 dB, and the maximum frequency sweep of approximately 50% of the fundamental frequency. The prototype showed a stable frequency response for angles of incidence up to 45°. Since results are in good agreement with simulations, we provide parametric equations to design 3-D structures at desired frequencies.
Auteurs: David Ferreira;Iñigo Cuiñas;Rafael F. S. Caldeirinha;Telmo R. Fernandes;
Apparue dans: IEEE Transactions on Antennas and Propagation
Date publication: 01.-2017, volume: 65, issue:1, pages: 242 - 250
Editeur: IEEE
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» 3-D Memristor Crossbars for Analog and Neuromorphic Computing Applications
Résumé:
We report a monolithically integrated 3-D metal-oxide memristor crossbar circuit suitable for analog, and in particular, neuromorphic computing applications. The demonstrated crossbar is based on Pt/Al2O3/TiO2–x/TiN/Pt memristors and consists of a stack of two passive $10times10$ crossbars with shared middle electrodes. The fabrication process has a low, less than 175 °C, temperature budget and includes a planarization step performed before the deposition of the second crossbar layer. These features greatly improve yield and uniformity of the crosspoint devices and allows for utilizing such a fabrication process for integration with CMOS circuits as well as for stacking of multiple crossbar layers. Furthermore, the integrated crosspoint memristors are optimized for analog computing applications allowing successful forming and switching of all 200 devices in the demonstrated crossbar circuit, and, most importantly, precise tuning of the devices’ conductance values within the dynamic range of operation. We believe that the demonstrated work is an important milestone toward the implementation of analog artificial neural networks, specifically, those based on 3-D CMOL circuits.
Auteurs: Gina C. Adam;Brian D. Hoskins;Mirko Prezioso;Farnood Merrikh-Bayat;Bhaswar Chakrabarti;Dmitri B. Strukov;
Apparue dans: IEEE Transactions on Electron Devices
Date publication: 01.-2017, volume: 64, issue:1, pages: 312 - 318
Editeur: IEEE
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» 3-D Numerical Simulation on Plasma Immersion Ion Implantation Batch Treating Process of Bearing Balls
Résumé:
In the plasma immersion ion implantation (PIII) process, since the dose distribution is affected by the sheath around the sample to be treated, controlling the sheath expanding process is very important for obtaining a good dose uniformity. In this paper, a 3-D particle-in-cell (PIC) model was established to study the sheath expanding process around balls of the bearing in a PIII batch treating process respectively. Using the finite difference method, the spatial distributions of the normalized potential and ion density in the simulation region were calculated by solving Poisson’s Equation, Newton’s motion equations and the Boltzmann assumption for the electrons. The influences of the magnitude and pulse width of the implantation voltage applied as well as the plasma density on the sheath conformability were studied. The simulation results show that the sheath conformability around the balls in batch treating process is worse than that in a single process due to the sheath overlap of neighbor bearing components. The bad conformability of the sheath would lead to a bad distribution of the incident dose on the surface of bearing balls. In order to guarantee the conformability of the sheath around the bearing balls, a small pulse width, enough display distance as well as proper implantation voltage and plasma density should be promised in the PIII batch treating process.
Auteurs: Yonghao Yu;Langping Wang;Xiaofeng Wang;Yang Lu;
Apparue dans: IEEE Transactions on Plasma Science
Date publication: 01.-2017, volume: 45, issue:1, pages: 39 - 42
Editeur: IEEE
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» 3-D Position Location in Ad Hoc Networks: A Manhattanized Space
Résumé:
Position location information (PLI) has become a crucial requirement for the provision of multiple location-based services in cellular and wireless ad hoc networks. As sensor networks and Internet of Things scenarios proliferate, 3-D position location becomes more relevant as a solution enabler for location-based services and applications. Nevertheless, PLI acquisition techniques in 3-D ad hoc and sensor networks present several challenges. For instance, conventional triangulation algorithms may not be applicable as a direct line of sight between concerned nodes and fixed references cannot be guaranteed. In this letter, a PLI acquisition algorithm suitable for 3-D ad hoc environments is proposed based on space discretization. Feasibility of the algorithm is examined through analysis and simulation. Algorithm improvements are also proposed.
Auteurs: Rafaela Villalpando-Hernández;David Muñoz-Rodríguez;Cesar Vargas-Rosales;Luis Rizo-Dominguez;
Apparue dans: IEEE Communications Letters
Date publication: 01.-2017, volume: 21, issue:1, pages: 124 - 127
Editeur: IEEE
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» 3-D-Printed 96 GHz Bull’s-Eye Antenna With Off-Axis Beaming
Résumé:
Reducing the profile, footprint and weight of antennas embarked on aircrafts, drones or satellites has been a long pursued objective. Here we tackle this issue by developing a millimeter-wave 96 GHz elliptical Bull’s-Eye antenna with off-axis radiation at 16.5° that has been fabricated by low cost 3-D printing stereolithography, followed by metal coating. The theoretical basis for optimum off-axis operations is explained. Measurement results show an overall good agreement with simulations, displaying a gain of 17 dB and a 3.5° beamwidth (E-plane) at the operational frequency. The off-axis beaming enlarges the potential applicability of this technology with respect to the broadside beam solution.
Auteurs: Unai Beaskoetxea;Stefano Maci;Miguel Navarro-Cía;Miguel Beruete;
Apparue dans: IEEE Transactions on Antennas and Propagation
Date publication: 01.-2017, volume: 65, issue:1, pages: 17 - 25
Editeur: IEEE
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» 3D Statistical Shape Models Incorporating Landmark-Wise Random Regression Forests for Omni-Directional Landmark Detection
Résumé:
3D Statistical Shape Models (3D-SSM) are widely used for medical image segmentation. However, during segmentation, they typically perform a very limited unidirectional search for suitable landmark positions in the image, relying on weak learners or use-case specific appearance models that solely take local image information into account. As a consequence, segmentation errors arise, and results in general depend on the accuracy of a previous model initialization. Furthermore, these methods become subject to a tedious and use-case dependent parameter tuning in order to obtain optimized results. To overcome these limitations, we propose an extension of 3D-SSM by landmark-wise random regression forests that perform an enhanced omni-directional search for landmark positions, thereby taking rich non-local image information into account. In addition, we provide a long distance model fitting based on a multi-scale approach, that allows an accurate and reproducible segmentation even from distant image positions, thus enabling an application without model initialization. Finally, translation of the proposed method to different organs is straightforward and requires no adaptation of the training process. In segmentation experiments on 45 clinical CT volumes, the proposed omni-directional search significantly increased accuracy and displayed great precision regardless of model initialization. Furthermore, for liver, spleen and kidney segmentation in a competitive multi-organ labeling challenge on publicly available data, the proposed method achieved similar or better results than the state of the art. Finally, liver segmentation results were obtained that successfully compete with specialized state-of-the-art methods from the well-known liver segmentation challenge SLIVER.
Auteurs: Tobias Norajitra;Klaus H. Maier-Hein;
Apparue dans: IEEE Transactions on Medical Imaging
Date publication: 01.-2017, volume: 36, issue:1, pages: 155 - 168
Editeur: IEEE
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» 3D-DXA: Assessing the Femoral Shape, the Trabecular Macrostructure and the Cortex in 3D from DXA images
Résumé:
The 3D distribution of the cortical and trabecular bone mass in the proximal femur is a critical component in determining fracture resistance that is not taken into account in clinical routine Dual-energy X-ray Absorptiometry (DXA) examination. In this paper, a statistical shape and appearance model together with a 3D-2D registration approach are used to model the femoral shape and bone density distribution in 3D from an anteroposterior DXA projection. A model-based algorithm is subsequently used to segment the cortex and build a 3D map of the cortical thickness and density. Measurements characterising the geometry and density distribution were computed for various regions of interest in both cortical and trabecular compartments. Models and measurements provided by the “3D-DXA” software algorithm were evaluated using a database of 157 study subjects, by comparing 3D-DXA analyses (using DXA scanners from three manufacturers) with measurements performed by Quantitative Computed Tomography (QCT). The mean point-to-surface distance between 3D-DXA and QCT femoral shapes was 0.93 mm. The mean absolute error between cortical thickness and density estimates measured by 3D-DXA and QCT was 0.33 mm and 72 mg/cm3. Correlation coefficients (R) between the 3D-DXA and QCT measurements were 0.86, 0.93, and 0.95 for the volumetric bone mineral density at the trabecular, cortical, and integral compartments respectively, and 0.91 for the mean cortical thickness. 3D-DXA provides a detailed analysis of the proximal femur, including a separate assessment of the cortical layer and trabecular macrostructure, which could potentially improve osteoporosis management while maintaining DXA as the standard routine modality.
Auteurs: Ludovic Humbert;Yves Martelli;Roger Fonollà;Martin Steghöfer;Silvana Di Gregorio;Jorge Malouf;Jordi Romera;Luis Miguel Del Río Barquero;
Apparue dans: IEEE Transactions on Medical Imaging
Date publication: 01.-2017, volume: 36, issue:1, pages: 27 - 39
Editeur: IEEE
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» 4-D Flow Control in Porous Scaffolds: Toward a Next Generation of Bioreactors
Résumé:
Tissue engineering (TE) approaches that involve seeding cells into predetermined tissue scaffolds ignore the complex environment where the material properties are spatially inhomogeneous and evolve over time. We present a new approach for controlling mechanical forces inside bioreactors, which enables spatiotemporal control of flow fields in real time. Our adaptive approach offers the flexibility of dialing-in arbitrary shear stress distributions and adjusting flow field patterns in a scaffold over time in response to cell growth without needing to alter scaffold structure. This is achieved with a multi-inlet bioreactor and a control algorithm with learning capabilities to dynamically solve the inverse problem of computing the inlet pressure distribution required over the multiple inlets to obtain a target flow field. The new method constitutes a new platform for studies of cellular responses to mechanical forces in complex environments and opens potentially transformative possibilities for TE.
Auteurs: Khalid Youssef;Nanette N. Jarenwattananon;Brian J. Archer;Julia Mack;M. Luisa Iruela-Arispe;Louis-S. Bouchard;
Apparue dans: IEEE Transactions on Biomedical Engineering
Date publication: 01.-2017, volume: 64, issue:1, pages: 61 - 69
Editeur: IEEE
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» 40 GSample/s All-Optical Analog to Digital Conversion With Resolution Degradation Prevention
Résumé:
In this letter, we report the experimental demonstration of a 40 GSample/s all-optical analog to digital converter (ADC). The proposed all-optical ADC consists of optical quantization and coding processes based on intensity-to-wavelength conversion by soliton self-frequency shift with an optical sampling process using an ultrastable optical pulse train. A 5-GHz sinusoidal analog input signal was successfully converted to a digitized output signal in real time with no degradation of resolution. (High sampling rate operation may lead to resolution degradation due to the reduction of pulse peak power and the narrowing of the interval between adjacent pulses.) To evaluate system performance, we estimated the effective number of bits from the experimental results as 3.79 b.
Auteurs: Tomotaka Nagashima;Makoto Hasegawa;Tsuyoshi Konishi;
Apparue dans: IEEE Photonics Technology Letters
Date publication: 01.-2017, volume: 29, issue:1, pages: 74 - 77
Editeur: IEEE
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» 5.6 Mb/mm $^{2}$ 1R1W 8T SRAM Arrays Operating Down to 560 mV Utilizing Small-Signal Sensing With Charge Shared Bitline and Asymmetric Sense Amplifier in 14 nm FinFET CMOS Technology
Résumé:
Multiported high-performance on-die memories occupy significantly more die area than a comparable single-port memory. Among various multiport memory topologies, the 1-read (R), 1-write (W) 8-transistor (T) Static Random Access Memory (SRAM) with a decoupled read port allows separate optimization of the read and write ports when organized without interleaved logical columns. This enables a lower minimum operating voltage ( $V_{mathrm{ min}}$ ) compared with other dual-port SRAMs that require ports optimized for read stability and write operations. However, the 1R1W 8T SRAM often employs large signal, hierarchical bitline sensing to achieve high performance due to the nondifferential read bitline. This large-signal read architecture necessitates frequently placed local bitline sensing circuits, degrading the array bit density. In this paper, we present two sense amplifier (SA) techniques for small-signal pseudo-differential sensing to facilitate 256 bits per bitline achieving an 8T SRAM array density of 5.6 Mb/mm $^{2}vphantom {^{int ^int }}$ in 14 nm FinFET CMOS. The first design employs a charge sharing SA scheme to generate a reference voltage ( $V_{mathrm{ REF}}$ ) by leveraging the capacitance of otherwise unused metal tracks over the bitcell column. The second design utilizes an asymmetric SA in which the read bitline precharged to $V_{mathrm{ CC}}$ in the unselected sector acts as a reference voltage and the active bitline side is intentionally upsized to skew the SA. High volume measurement results demonstrate 560 mV $V_{min }$ at 400 MHz/−10 °C and reaches 2.21- GHz at 1 V supply.
Auteurs: Jaydeep P. Kulkarni;John Keane;Kyung-Hoae Koo;Satyanand Nalam;Zheng Guo;Eric Karl;Kevin Zhang;
Apparue dans: IEEE Journal of Solid-State Circuits
Date publication: 01.-2017, volume: 52, issue:1, pages: 229 - 239
Editeur: IEEE
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» 60-GHz LTCC Differential-Fed Patch Antenna Array With High Gain by Using Soft-Surface Structures
Résumé:
This paper presents a 60-GHz 4 \times 4 differential -fed patch antenna array using low-temperature cofired ceramic (LTCC) process. Wideband patch with L-shaped feeding scheme is adopted as antenna element, while differential substrate integrated waveguide feeding network with low insertion loss is applied for the integration of antenna array. The differential-fed structure improves the symmetry of radiation patterns and reduces the cross-polarization level significantly. To further suppress the surface wave and improve the gain of the antenna array, one kind of soft surface structure is proposed. The equivalent circuit model of the soft surface is developed for calculating its dispersion diagram and analyzing stopband characteristics. The simulated results indicate that the antenna gain enhancement can be up to 2 dB because of the proposed soft surface. For demonstration, one prototype using LTCC process is fabricated and measured. The measured 10-dB impedance bandwidth of the antenna array is 11.7%. The measured antenna peak gain of 18.62 dBi at 61.5 GHz and symmetrical radiation patterns with a low cross polarization of −25 dB across the whole operating frequency are achieved.
Auteurs: Huayan Jin;Wenquan Che;Kuo-Sheng Chin;Guangxu Shen;Wanchen Yang;Quan Xue;
Apparue dans: IEEE Transactions on Antennas and Propagation
Date publication: 01.-2017, volume: 65, issue:1, pages: 206 - 216
Editeur: IEEE
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» 7.28-W, High-Energy, Conductively Cooled, Q-Switched Tm,Ho:YLF Laser
Résumé:
A diode-side-pumped laser oscillator with a Tm,Ho:YLF rod conductively cooled to −80 °C was developed. A Q-switched pulse energy of 104 mJ was achieved at a pulse repetition frequency of 70 Hz, corresponding to an average output power of 7.28 W. In addition, the maximum Q-switched pulse energy of 125 mJ was obtained at 50 Hz. Even at the maximum output level, the beam quality factor $M^{mathrm {mathbf {2}}}$ was measured to be $leq $ 1.5. To the best of our knowledge, this is the highest average output power reported for a 100-mJ-class Q-switched 2- $mu text{m}$ laser oscillator using a conductively cooled laser head.
Auteurs: Atsushi Sato;Makoto Aoki;Shoken Ishii;Ryouhei Otsuka;Kohei Mizutani;Satoshi Ochiai;
Apparue dans: IEEE Photonics Technology Letters
Date publication: 01.-2017, volume: 29, issue:1, pages: 134 - 137
Editeur: IEEE
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» A $4 times 4 times 2$ Homogeneous Scalable 3D Network-on-Chip Circuit With 326 MFlit/s 0.66 pJ/b Robust and Fault Tolerant Asynchronous 3D Links
Résumé:
Future many cores, either for high performance computing or for embedded applications, are facing the power wall, and cannot be scaled up using only the reduction of technology nodes; 3D integration, using through silicon via (TSV) as an advanced packaging technology, allows further system integration, while reducing the power dissipation devoted to system-level communication. In this paper, we present a 3D modular and scalable network-on-chip (NoC) architecture implemented using robust asynchronous logic. The 3DNOC circuit targets a Telecom long-term evolution application; it is composed of two die layers, fabricated in 65 nm technology using TSV middle aspect ratio 1:8, and integrates ESD protection, a 3D design-for-test, and a fault tolerant scheme. The 3D links achieve 0.66 pJ/b energy consumption and 326 Mb/s data rate per pin for the parallel link. Thin die effect is demonstrated by thermal analysis and measurements, as well as the dynamic self-adaptation of the 3D link performances with 3D thermal conditions. Finally, the scalability of the 3DNOC circuit, in terms of power delivery network and thermal dissipation, is demonstrated by using simulations up to a 3D stack of eight die layers.
Auteurs: Pascal Vivet;Yvain Thonnart;Romain Lemaire;Cristiano Santos;Edith Beigné;Christian Bernard;Florian Darve;Didier Lattard;Ivan Miro-Panadès;Denis Dutoit;Fabien Clermidy;S. Cheramy;Abbas Sheibanyrad;Frédéric Pétrot;Eri
Apparue dans: IEEE Journal of Solid-State Circuits
Date publication: 01.-2017, volume: 52, issue:1, pages: 33 - 49
Editeur: IEEE
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» A $K$ -Band High Efficiency High Power Monolithic GaAs Power Oscillator Using Class-E Network
Résumé:
This letter presents design of a K-band high power high efficiency monolithic GaAs power oscillators using class-E load network with finite dc-feed inductance. To further extend the operation frequency up to millimeter-wave band with high efficiency, the core transistor is operated in the saturated region with overdriven condition to obtain the bifurcated current waveform. The proposed power oscillator is fabricated using a 0.15- $mu text {m}$ GaAs pseudomorphic high-electron mobility transistor process, and it features a tuning range from 23.5 to 24.5 GHz, a peak efficiency of 19%, a maximum output power of 21 dBm, and a phase noise of −106.3 dBc/Hz at 1-MHz offset.
Auteurs: Hong-Yeh Chang;Chi-Hsien Lin;Yu-Cheng Liu;Wen-Ping Li;Yu-Chi Wang;
Apparue dans: IEEE Microwave and Wireless Components Letters
Date publication: 01.-2017, volume: 27, issue:1, pages: 55 - 57
Editeur: IEEE
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» A ±50-mV Linear-Input-Range VCO-Based Neural-Recording Front-End With Digital Nonlinearity Correction
Résumé:
Closed-loop neuromodulation is an essential function in future neural implants for delivering efficient and effective therapy. However, a closed-loop system requires the neural-recording front-end to handle large stimulation artifacts—a feature not supported by most state-of-the-art designs. In this paper, we present a neural-recording front-end that has an input range of ±50 mV and can be used in closed-loop systems. The proposed front-end avoids the saturation due to stimulation artifacts by employing a voltage-controlled oscillator (VCO) to directly convert the input signal into the frequency domain. The VCO nonlinearity is corrected using area-efficient foreground polynomial correction. Implemented in a 40-nm CMOS process, the design occupies 0.135 mm $^{mathrm { {2}}}$ with an analog power of 3 $mu text{W}$ and a digital switching power of 4 $mu text{W}$ . It achieves ten times higher linear input range than prior art, and 79-dB spurious-free dynamic range at peak input, with an input-referred noise of 5.2 $mu text{V}_{mathrm { {rms}}}$ across the local-field-potential band of 1–200 Hz. With on-chip subhertz high-pass filters realized by duty-cycled resistors, the front-end also eliminates the need of off-chip dc-blocking capacitors.
Auteurs: Wenlong Jiang;Vahagn Hokhikyan;Hariprasad Chandrakumar;Vaibhav Karkare;Dejan Marković;
Apparue dans: IEEE Journal of Solid-State Circuits
Date publication: 01.-2017, volume: 52, issue:1, pages: 173 - 184
Editeur: IEEE
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» A 0.0021 mm2 1.82 mW 2.2 GHz PLL Using Time-Based Integral Control in 65 nm CMOS
Résumé:
Modern multicore processors employ multiple phase-locked loops (PLLs) to operate individual cores at a power-optimal frequency. This paper presents techniques to implement such PLLs in a small area. The area occupied by classical charge-pump-based analog PLLs is mostly due to the large loop filter capacitor needed to implement the integral control portion of type-II response. Digital PLLs (DPLL) can eliminate the capacitor by implementing the integral control in digital domain but their jitter performance is degraded by the quantization error introduced by DPLL building blocks such as a time-to-digital converter (TDC). We seek to combine the advantages of analog (no quantization error) and digital (small area) PLLs by implementing the integral control using time-based techniques. To this end, a ring oscillator-based integrator (ROI) is used to implement the integral control. ROI integrates its input and generates an output in the form of a pulse-width modulated (PWM) signal. While the ROI does not introduce quantization error, controlling the voltage controlled oscillator with the PWM signal introduces undesirable spurious tones. We propose to use a pseudo-differential ROI to mitigate these tones and achieve good jitter performance. Fabricated in 65 nm CMOS LP process, the prototype PLL occupies an active area of only 0.0021 mm2 and operates across a supply voltage range of 0.6 V to 1.2 V providing 0.4–2.6 GHz output frequencies. At 2.2 GHz output frequency, the PLL consumes 1.82 mW at 1 V supply voltage, and achieves 3.73 psrms integrated jitter. This translates to an FoMJ of −226.0 dB, which compares favorably with state-of-the-art designs while occupying the smallest reported active area.
Auteurs: Junheng Zhu;Romesh Kumar Nandwana;Guanghua Shu;Ahmed Elkholy;Seong Joong Kim;Pavan Kumar Hanumolu;
Apparue dans: IEEE Journal of Solid-State Circuits
Date publication: 01.-2017, volume: 52, issue:1, pages: 8 - 20
Editeur: IEEE
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» A 0.5–9.5-GHz, 1.2- $mu text{s}$ Lock-Time Fractional-N DPLL With ±1.25%UI Period Jitter in 16-nm CMOS for Dynamic Frequency and Core-Count Scaling
Résumé:
A phase-locked loop (PLL) architecture is proposed for improved efficiency of power and thermal management techniques in system-on-chips (SoCs). PLL architecture introduces two techniques: a dual-stage phase-acquisition loop filter that enables fast lock time of 1.2 $mu text{s}$ without any frequency overshoots and a nonlinear DCO that enables a wide frequency range of 0.5–9.5 GHz and a low period jitter of ±1.25%UI p-p with a single wideband tuning. With this proposed PLL architecture, SoC can continue its operation without any interruption caused by frequency overshoots during power and thermal management techniques like dynamic core-count scaling and dynamic voltage frequency scaling. The PLL achieves 0.45 ps rms period jitter at 3.25 GHz in fractional-N mode operation, while consuming a total power of 7.1 mW.
Auteurs: Fazil Ahmad;Greg Unruh;Amrutha Iyer;Pin-En Su;Sherif Abdalla;Bo Shen;Mark Chambers;Ichiro Fujimori;
Apparue dans: IEEE Journal of Solid-State Circuits
Date publication: 01.-2017, volume: 52, issue:1, pages: 21 - 32
Editeur: IEEE
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» A 0.6-V, 0.015-mm2, Time-Based ECG Readout for Ambulatory Applications in 40-nm CMOS
Résumé:
A scalable time-based analog front end in 40-nm CMOS is presented for ECG readout for ambulatory applications. The main challenge addressed is achieving a large dynamic range readout (necessary to handle large signals during motion) in a power and area-efficient manner at low voltage supplies while also tackling the challenges of increase in flicker noise and gate-leakage current. Demonstrated results show a significant improvement in ac-dynamic range without compromising on area (0.015 mm $^{2}$ ) and power consumption ( $3.3~mu text{W}$ ). This paper will be relevant toward developing low-cost, low-power sensor system-on-chips required for wearable biomedical applications.
Auteurs: Rachit Mohan;Samira Zaliasl;Georges G. E. Gielen;Chris Van Hoof;Refet Firat Yazicioglu;Nick Van Helleputte;
Apparue dans: IEEE Journal of Solid-State Circuits
Date publication: 01.-2017, volume: 52, issue:1, pages: 298 - 308
Editeur: IEEE
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» A 1.2 V 20 nm 307 GB/s HBM DRAM With At-Speed Wafer-Level IO Test Scheme and Adaptive Refresh Considering Temperature Distribution
Résumé:
A 1.2 V 20 nm 307 GB/s high-bandwidth memory (HBM) DRAM is presented to satisfy a high-bandwidth requirement of high-performance computing application. The HBM is composed of buffer die and multiple core dies, and each core die has 8 Gb DRAM cell array with additional 1 Gb ECC array. At-speed wafer level, a u-bump IO test scheme and an adaptive refresh scheme considering temperature distribution are proposed to guarantee test coverage and stable operation in a power-efficient manner.
Auteurs: Kyomin Sohn;Won-Joo Yun;Reum Oh;Chi-Sung Oh;Seong-Young Seo;Min-Sang Park;Dong-Hak Shin;Won-Chang Jung;Sang-Hoon Shin;Je-Min Ryu;Hye-Seung Yu;Jae-Hun Jung;Hyunui Lee;Seok-Yong Kang;Young-Soo Sohn;Jung-Hwan Choi;Yong-Cheol Bae;Seong-Jin Jang;Gyoyoung
Apparue dans: IEEE Journal of Solid-State Circuits
Date publication: 01.-2017, volume: 52, issue:1, pages: 250 - 260
Editeur: IEEE
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» A 1.2-V Self-Reconfigurable Recursive Mixer With Improved IF Linearity in 130-nm CMOS
Résumé:
A 1.2-V self-reconfigurable recursive mixer structure with improved intermediate frequency (IF) linearity and signal isolation is proposed. For a traditional recursive mixer that reuses the gm stage to amplify both the input radio frequency (RF) and downconverted IF signal, signal isolation and linearity are limited by the signal-reusing structure. In this brief, the self-reconfigurable gm stage is designed to provide open-loop $V!!-!!I$ conversion for the input RF signal and acts as a negative-feedback voltage amplifier for the downconverted IF signal. The RF and IF signal paths are also split by the filtering networks and the feedback branches within the gm stage. Thus, IF linearity, loop stability, and signal isolation are all guaranteed. The proposed mixer was designed and fabricated in a Taiwan Semiconductor Manufacturing Company 130-nm complementary metal–oxide–semiconductor process and occupied a die area of 0.48 mm2. The mixer operates in the frequency band from 2 to 3 GHz with the conversion gain of around 33 dB. The measured input-referred third-order intercept point and the double-sideband noise figure are −16 dBm and 11 dB, respectively, at 2.4-GHz input frequency. The power consumption is 2.5 mW under 1.2-V supply voltage.
Auteurs: Chao Chen;Jianhui Wu;
Apparue dans: IEEE Transactions on Circuits and Systems II: Express Briefs
Date publication: 01.-2017, volume: 64, issue:1, pages: 36 - 40
Editeur: IEEE
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» A 10 Gbits/s/pin DFE-Less Graphics DRAM Interface With Adaptive-Bandwidth PLL for Avoiding Noise Interference and CIJ Reduction Technique
Résumé:
A 10 Gbits/s/pin graphics DRAM interface is developed in 65-nm CMOS technology. Several design techniques are proposed for high-speed operation in a noisy environment. A fast precharging data sampler guarantees high-speed sampling without the need for a decision feedback equalizer. In order to increase the data sampling margin, the PLL bandwidth is optimized depending on the system noises, which reduces the clock jitter by up to 55.1%. The crosstalk-induced jitter (CIJ) reduction technique suppresses the DQs jitter by employing the suggested training sequence for the GDDR5 interface. Pre- and de-emphasis are merged in one auxiliary driver. This chip operates at 10 Gbits/s/pin and exhibits a data eye opening of 0.78 UI with the CIJ reduction technique. The power consumptions of the TX and RX are 8.28 and 5.5 pJ/b/channel, respectively.
Auteurs: Junyoung Song;Hyun-Woo Lee;Sewook Hwang;Chulwoo Kim;
Apparue dans: IEEE Transactions on Very Large Scale Integration Systems
Date publication: 01.-2017, volume: 25, issue:1, pages: 344 - 353
Editeur: IEEE
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» A 10 nm FinFET 128 Mb SRAM With Assist Adjustment System for Power, Performance, and Area Optimization
Résumé:
Two 128 Mb 6T SRAM test chips are implemented in a 10 nm FinFET technology. A 0.040 $mu text{m}^{2}$ 6T SRAM bitcell is designed for high density (HD), and 0.049 $mu text{m}^{2}$ for high performance (HP). The various SRAM assist schemes are explored to evaluate the power, performance, and area (PPA) gain, and the figure-of-merit (FOM) is induced by the minimum operating voltage ( $V_{mathrm{ MIN}}$ ) and assist overheads. The dual-transient wordline scheme is proposed to improve the $V_{mathrm{ MIN}}$ by 47.5 mV for the 128 Mb 6T-HP SRAM. The suppressed bitline scheme with negative bitline improves the $V_{mathrm{ MIN}}$ by 135 mV for the 128 Mb 6T-HD SRAM. The FOM of PPA gain evaluates the optimum SRAM assist for the different bitcells based on the applications.
Auteurs: Taejoong Song;Woojin Rim;Sunghyun Park;Yongho Kim;Giyong Yang;Hoonki Kim;Sanghoon Baek;Jonghoon Jung;Bongjae Kwon;Sungwee Cho;Hyuntaek Jung;Yongjae Choo;Jaeseung Choi;
Apparue dans: IEEE Journal of Solid-State Circuits
Date publication: 01.-2017, volume: 52, issue:1, pages: 240 - 249
Editeur: IEEE
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» A 10-bit 500-MS/s Partial-Interleaving Pipelined SAR ADC With Offset and Reference Mismatch Calibrations
Résumé:
A 10-bit 500-MS/s partial-interleaving pipelined successive approximation register (SAR) analog-to-digital converter (ADC) architecture is presented that implements a full-speed 2-bit/cycle SAR at the front end with interleaved residue MDACs and SAR ADCs at the back end. This architecture achieves high speed, while preventing the interleaving spurs. In addition, the design considerations and calibration techniques for gain and offset are also introduced. A histogram stage gain error (HSGE) calibration is implemented to correct the conversion nonlinearities in the digital domain. Measurement results on a 65-nm CMOS prototype show an signal-to-noise distortion ratio (SNDR) of 55.9 dB at dc input and a figure of merit (FoM) of 32 fJ/conversion step at 1.2 V supply.
Auteurs: Yan Zhu;Chi-Hang Chan;Seng Pan U;Rui Paulo Martins;
Apparue dans: IEEE Transactions on Very Large Scale Integration Systems
Date publication: 01.-2017, volume: 25, issue:1, pages: 354 - 363
Editeur: IEEE
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» A 10-GS/s 4-Bit Single-Core Digital-to-Analog Converter for Cognitive Ultrawidebands
Résumé:
This brief delineates the design and realization of a 10-GS/s 4-bit digital-to-analog converter (DAC) for the cognitive ultrawideband (CUWB), an emerging solution for low interference and efficient spectrum utilization in communication networks. The DAC serves as the data converter for the adaptive waveform transmitter therein, largely to reduce its power dissipation and hardware complexity. For reasons of low power dissipation and low-cost CUWB application, the resolution of the DAC is 4 bits, its realization is in standard 65-nm CMOS, and the architecture is a single core. The binary current-steering DAC includes critical building blocks such as current sources and a novel deglitcher circuit. The current sources are designed for small area with high linearity based on our derived relationship between current-source output resistance and linearity parameters [integral nonlinearity (INL) and spurious-free dynamic range (SFDR)]. The deglitcher design includes high-speed source followers as high-speed low voltage swing buffers to improve the linearity by decreasing the output glitch energy. The DAC embodies an in situ hardware efficient (small integrated-circuit area and reduced input/output pinout) tester that generates 4 $times$ 10-Gb/s test-data pattern to facilitate functional verification. The designed DAC achieves ≤ 0.16-least significant bit INL/differential nonlinearity and > 23-dBc SFDR over the Nyquist bandwidth up to 4.53 GHz, and features the most competitive figures-of-merit of all similar DACs reported to date.
Auteurs: F. N. U. Juanda;Wei Shu;Joseph S. Chang;
Apparue dans: IEEE Transactions on Circuits and Systems II: Express Briefs
Date publication: 01.-2017, volume: 64, issue:1, pages: 16 - 20
Editeur: IEEE
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» A 16 nm FinFET Heterogeneous Nona-Core SoC Supporting ISO26262 ASIL B Standard
Résumé:
It is getting mandatory to comply with ISO26262 in the recent automotive development. The implementation of safety mechanism to detect faults is one of the keys in ISO26262. The fault prediction will make the automotive system more reliable. The SoC in this paper introduces two features: hardware built-in self-test (BIST) for safety mechanism supporting automotive safety integrity level (ASIL) B and killer-droop monitor for fault prediction. In addition, time slicing is introduced to the testing with hardware BIST during runtime so that each test session can be shorter than the required interrupt response time in the application. The killer-droop monitor can predict the voltage droop and stop the clock supply for a certain period of time to mitigate the droop for preventing delay faults on the SoC. The monitor samples the voltage based on time-to-digital converter at CPU operation clock and predicts the voltage from the history of sampled voltage. With that prediction feature, the minimum operation voltage can be improved by 50 mV at 2.02 GHz CPU operation, and the maximum frequency can be improved by 140 MHz under 0.82 V power supply in 16 nm process.
Auteurs: Shinichi Shibahara;Chikafumi Takahashi;Kazuki Fukuoka;Yuko Kitaji;Takahiro Irita;Hirotaka Hara;Yasuhisa Shimazaki;Jun Matsushima;
Apparue dans: IEEE Journal of Solid-State Circuits
Date publication: 01.-2017, volume: 52, issue:1, pages: 77 - 88
Editeur: IEEE
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» A 2.3-mW 11-cm Range Bootstrapped and Correlated-Double-Sampling Three-Dimensional Touch Sensing Circuit for Mobile Devices
Résumé:
This brief discusses an oscillator-based capacitive 3-D touch-sensing circuit for mobile devices. The proposed 3-D touch sensor uses correlated double sampling to achieve a high sensing resolution in the Z-direction and employs bootstrapping circuitry to reduce the mobile screen's interchannel-coupling effects. Additionally, to reduce chip area and assembly, the sensing oscillator is implemented with inverter-based active resonators instead of using either on- or off-chip inductors. The prototyped 3-D touch sensor is fabricated using 65-nm CMOS process technology and consumes an area of 2 mm2, with a 2.3-mW power consumption from a 1-V power supply. Measured together with a 3.4′′ HTC standard mobile screen, the sensor achieves an 11-cm Z-direction sensing range with a 1-cm resolution, demonstrating the potential implementation of 3-D finger position sensing in a mobile device.
Auteurs: Li Du;Yan Zhang;Chun-Chen Liu;Adrian Tang;Frank Hsiao;Mau-Chung Frank Chang;
Apparue dans: IEEE Transactions on Circuits and Systems II: Express Briefs
Date publication: 01.-2017, volume: 64, issue:1, pages: 96 - 100
Editeur: IEEE
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» A 2.5-ps Bin Size and 6.7-ps Resolution FPGA Time-to-Digital Converter Based on Delay Wrapping and Averaging
Résumé:
A high-resolution time-to-digital converter (TDC) implemented with field programmable gate array (FPGA) based on delay wrapping and averaging is presented. The fundamental idea is to pass a single clock through a series of delay elements to generate multiple reference clocks with different phases for input time quantization. Due to periodicity, those phases will be equivalently wrapped within one reference clock period to achieve the required fine resolution. In practice, a hybrid delay matrix is created to significantly reduce the required number of delay cells. Multiple TDC cores are constructed for parallel measurements and then exquisite routing control and averaging are applied to smooth out the large quantization errors caused by the inhomogeneity of the TDC delay lines for both linearity and single-shot precision enhancement. To reduce the impact of temperature sensitivity, a cancellation circuit is created to substantially reduce the offset and confine the output difference within 2 LSB for the same input interval over the full operation temperature range of FPGA. With such a fine resolution of 2.5 ps, the integral nonlinearity is measured to be from merely −2.98 to 3.23 LSB and the corresponding rms resolution is 4.99–6.72 ps. The proposed TDC is tested to be fully functional over 0 °C–50 °C ambient temperature range with extremely low resolution variation. Its performance is even superior to many full-custom-designed TDCs.
Auteurs: Poki Chen;Ya-Yun Hsiao;Yi-Su Chung;Wei Xiang Tsai;Jhih-Min Lin;
Apparue dans: IEEE Transactions on Very Large Scale Integration Systems
Date publication: 01.-2017, volume: 25, issue:1, pages: 114 - 124
Editeur: IEEE
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» A 200-mA Digital Low Drop-Out Regulator With Coarse-Fine Dual Loop in Mobile Application Processor
Résumé:
This paper proposes a coarse-fine dual-loop architecture for the digital low drop-out (LDO) regulators with fast transient response and more than 200-mA load capacity. In the proposed scheme, the output voltage is coregulated by two loops, namely, the coarse loop and the fine loop. The coarse loop adopts a fast current-mirror flash analog to digital converter and supplies high output current to enhance the transient performance, while the fine loop delivers low output current and helps reduce the voltage ripples and improve the regulation accuracies. Besides, a digital controller is implemented to prevent contentions between the two loops. Fabricated in a 28-nm Samsung CMOS process, the proposed digital LDO achieves maximum load up to 200 mA when the input and the output voltages are 1.1 and 0.9 V, respectively, with a chip area of 0.021 mm2. The measured output voltage drop of around 120 mV is observed for a load step of 180 mA.
Auteurs: Yong-Jin Lee;Wanyuan Qu;Shashank Singh;Dae-Yong Kim;Kwang-Ho Kim;Sang-Ho Kim;Jae-Jin Park;Gyu-Hyeong Cho;
Apparue dans: IEEE Journal of Solid-State Circuits
Date publication: 01.-2017, volume: 52, issue:1, pages: 64 - 76
Editeur: IEEE
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» A 220-mV Power-on-Reset Based Self-Starter With 2-nW Quiescent Power for Thermoelectric Energy Harvesting Systems
Résumé:
Miniaturized thin-film thermoelectric generators (TEGs) are emerging energy harvesting sources suitable for wearable and implantable applications. However, these sources usually exhibit large internal equivalent series resistance (ESR) that leads to low energy conversion efficiency and self-startup failures at ultra-low voltages. This paper presents a highly efficient boost converter with a novel Power-on-Reset (PoR) based self-startup circuit for systems harvesting the micro-scale thermal energy. The proposed circuit generates a train of pulses to kick start the self-startup through an internal feedback loop formed by the ESR of TEG, an auxiliary boost converter and a PoR circuit. The self-startup circuit is automatically disabled after the startup operation with a quiescent power consumption of 2 nW. A boost converter test chip with the proposed self-starter was fabricated in 65-nm CMOS technology node. It achieved a self-startup TEG voltage of 220 mV and a peak conversion efficiency of 76%. The minimum input voltage to sustain the boost operation is as low as 85 mV after the startup.
Auteurs: Abhik Das;Yuan Gao;Tony Tae-Hyoung Kim;
Apparue dans: IEEE Transactions on Circuits and Systems I: Regular Papers
Date publication: 01.-2017, volume: 64, issue:1, pages: 217 - 226
Editeur: IEEE
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» A 24 GHz High Frequency-Sweep Linearity FMCW Signal Generator with Floating-Shield Distributed Metal Capacitor Bank
Résumé:
A 24 GHz FMCW generator based on ADPLL was implemented in this work. Two-point modulation technology was used to achieve high sweep linearity. Meanwhile, a floating shield distributed metal capacitor bank was proposed to provide high frequency-sweep linearity DCO. By using these technologies, the FMCW generator’s frequency error can be controlled as small as 60 kHzrms when 180 MHz frequency was swept in 1.3 ms. High speed part of the FMCW generator was fabricated in 65 nm CMOS technology and the low speed digital part was implemented on FPGA. Power consumption of the chip excluding IO buffers is 29 mW.
Auteurs: Jianfei Xu;Na Yan;Sichen Yu;Lei Ma;Dashan Pan;Xiaoyang Zeng;Hao Min;
Apparue dans: IEEE Microwave and Wireless Components Letters
Date publication: 01.-2017, volume: 27, issue:1, pages: 52 - 54
Editeur: IEEE
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» A 3-D Active Contour Method for Automated Segmentation of the Left Ventricle From Magnetic Resonance Images
Résumé:
Objective: This study's objective is to develop and validate a fast automated 3-D segmentation method for cardiac magnetic resonance imaging (MRI). The segmentation algorithm automatically reconstructs cardiac MRI DICOM data into a 3-D model (i.e., direct volumetric segmentation), without relying on prior statistical knowledge. Methods: A novel 3-D active contour method was employed to detect the left ventricular cavity in 33 subjects with heterogeneous heart diseases from the York University database. Papillary muscles were identified and added to the chamber using a convex hull of the left ventricle and interpolation. The myocardium was then segmented using a similar 3-D segmentation method according to anatomic information. A multistage approach was taken to determine the method's efficacy. Results: Our method demonstrated a significant improvement in segmentation performance when compared to manual segmentation and other automated methods. Conclusion and Significance: A true 3-D reconstruction technique without the need for training datasets or any user-driven segmentation has been developed. In this method, a novel combination of internal and external energy terms for active contour was utilized that exploits histogram matching for improving the segmentation performance. This method takes advantage of full volumetric imaging, does not rely on prior statistical knowledge, and employs a convex-hull interpolation to include the papillary muscles.
Auteurs: Mahdi Hajiaghayi;Elliott M. Groves;Hamid Jafarkhani;Arash Kheradvar;
Apparue dans: IEEE Transactions on Biomedical Engineering
Date publication: 01.-2017, volume: 64, issue:1, pages: 134 - 144
Editeur: IEEE
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» A 4.7-Gb/s Reconfigurable CMOS Imaging Optical Receiver Utilizing Adaptive Spectrum Balancing Equalizer
Résumé:
This paper presents a fully integrated imaging receiver for high data rate wireless optical communication. A $3times 3$ matrix of Spatially Modulated Light detectors (SML), each with 730-MHz bandwidth followed by on-chip switches are integrated to allow the detection of photodiodes (PDs) in Line of Sight (LOS) with the transmitter. The imaging optical receiver employs a novel adaptive equalizer that uses spectrum reshaping to equalize the low bandwidth of the SML PD and partially compensate for the variable capacitance seen by the transimpedance amplifier resulting from dynamic LOS variations. Implemented in 130-nm CMOS technology, the chip provides an optical sensitivity of -3.5 dBm for $lambda =850$ nm modulated light with 4.7-Gb/s $2^{31}-1$ random data at ${mathrm{ BER}}=10^{-10}$ , and -4.4 dBm at 4.5 Gb/s with ${mathrm{ BER}}=10^{-12}$ , using one activated PD. For the case when all nine PDs are activated, corresponding to 11.5 pF total PDs capacitance at the input of the transimpedance amplifier, measurement results show a sensitivity of -5 dBm for 2-Gb/s data at ${text { BER}}=10^{-12}$ . The total power consumption including the differential output buffer is 97 mW from a single 1.5-V supply while providing 750-mV peak to peak output voltage over the $100~Omega $ differential resistance of the measurement equipment. The total die area including bond pads is $870times 1400~mu text{m} ,, times ,, mu tex- {m}$ .
Auteurs: Behrooz Nakhkoob;Mona Mostafa Hella;
Apparue dans: IEEE Transactions on Circuits and Systems I: Regular Papers
Date publication: 01.-2017, volume: 64, issue:1, pages: 182 - 194
Editeur: IEEE
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» A 4096-Point Radix-4 Memory-Based FFT Using DSP Slices
Résumé:
This brief presents a novel 4096-point radix-4 memory-based fast Fourier transform (FFT). The proposed architecture follows a conflict-free strategy that only requires a total memory of size $N$ and a few additional multiplexers. The control is also simple, as it is generated directly from the bits of a counter. Apart from the low complexity, the FFT has been implemented on a Virtex-5 field programmable gate array (FPGA) using DSP slices. The goal has been to reduce the use of distributed logic, which is scarce in the target FPGA. With this purpose, most of the hardware has been implemented in DSP48E. As a result, the proposed FPGA is efficient in terms of hardware resources, as is shown by the experimental results.
Auteurs: Mario Garrido;Miguel Ángel Sánchez;María Luisa López-Vallejo;Jesús Grajal;
Apparue dans: IEEE Transactions on Very Large Scale Integration Systems
Date publication: 01.-2017, volume: 25, issue:1, pages: 375 - 379
Editeur: IEEE
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» A 5-bit 300–900-MS/s 0.8–1.2-V Supply Voltage ADC With Background Self-Calibration
Résumé:
Low-power, high-speed, and low-resolution analog-to-digital converters (ADCs) are mandatory for a wide range of modern applications. In this brief, a background-calibrated low-power 5-bit comparator-based binary-search ADC is presented. The ADC, which was implemented in a 130-nm complementary metal–oxide–semiconductor process, can compensate for process–voltage–temperature variations on-the-fly and offers state-of-the-art figure of merit (FoM) for the set of specifications. Multiple track-and-hold working in time interleaving are employed to enable increased conversion speed at low power consumption, whereas the comparator stages operate in amplifierless pipelining. As the comparators present a significant offset spread due to process variations, the thresholds are concurrently calibrated with the conversion using a reference digital-to-analog converter. The ADC operates with supply voltages ranging from 0.8 to 1.2 V. When supplied with 0.8 V, the ADC performs up to 300 MS/s and presents 28.13 dB, 235 $mutext{W}$, and 39.4 fJ/conversion step of signal-to-noise-and-distortion ratio (SNDR), power consumption, and FoM, respectively. With 1.2 V of supply, the ADC performs up to 900 MS/s and presents 27.83 dB of SNDR, 1.54 mW of power consumption, and 82.5 fJ/conversion step of FoM.
Auteurs: Fábio Rabuske;Taimur Rabuske;Jorge Fernandes;
Apparue dans: IEEE Transactions on Circuits and Systems II: Express Briefs
Date publication: 01.-2017, volume: 64, issue:1, pages: 1 - 5
Editeur: IEEE
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» A 5-Gb/s Digital Clock and Data Recovery Circuit With Reduced DCO Supply Noise Sensitivity Utilizing Coupling Network
Résumé:
A digital clock and data recovery (CDR) is presented, which employs a low supply sensitivity scheme for a digitally controlled oscillator (DCO). A coupling network comprising capacitors, resistors, and coupling buffers enhances the supply variation immunity of the DCO and mitigates the jitter performance degradation. A supply variation-dependent bias generator produces the corresponding bias voltage to alleviate the supply variation with minimal area and power penalty. The proposed scheme improves 29.3 ps of peak-to-peak jitter and 11.5 dB of spur level, at 6 and 5 MHz 50 mVpp sinusoidal supply noise tone, respectively. Fabricated in a 65-nm CMOS process, the proposed CDR operates at 5-Gb/s data rate with BER $<10^{-12}$ for PRBS 31 and consumes 15.4 mW. The CDR occupies an active die area of 0.075 mm2.
Auteurs: Taeho Lee;Yong-Hun Kim;Lee-Sup Kim;
Apparue dans: IEEE Transactions on Very Large Scale Integration Systems
Date publication: 01.-2017, volume: 25, issue:1, pages: 380 - 384
Editeur: IEEE
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» A 502-GOPS and 0.984-mW Dual-Mode Intelligent ADAS SoC With Real-Time Semiglobal Matching and Intention Prediction for Smart Automotive Black Box System
Résumé:
The advanced driver assistance system (ADAS) for adaptive cruise control and collision avoidance is strongly dependent upon the robust image recognition technology such as lane detection, vehicle/pedestrian detection, and traffic sign recognition. However, the conventional ADAS cannot realize more advanced collision evasion in real environments due to the absence of intelligent vehicle/pedestrian behavior analysis. Moreover, accurate distance estimation is essential in ADAS applications and semiglobal matching (SGM) is most widely adopted for high accuracy, but its system-on-chip (SoC) implementation is difficult due to the massive external memory bandwidth. In this paper, an ADAS SoC with behavior analysis with Artificial Intelligence functions and hardware implementation of SGM is proposed. The proposed SoC has dual-mode operations of high-performance operation for intelligent ADAS with real-time SGM in D-Mode (d-mode) and ultralow-power operation for black box system in parking-mode. It features: 1) task-level pipelined SGM processor to reduce external memory bandwidth by 85.8%; 2) region-of-interest generation processor to reduce 86.2% of computation; 3) mixed-mode intention prediction engine for dual-mode intelligence; and 4) dynamic voltage and frequency scaling control to save 36.2% of power in d-mode. The proposed ADAS processor achieves 862 GOPS/W energy efficiency and 31.4-GOPS/mm2 area efficiency, which are 1.53 $times $ and 1.75 $times $ improvements than the state of the art, with 30 frames/s throughput under 720p stereo inputs.
Auteurs: Kyuho Jason Lee;Kyeongryeol Bong;Changhyeon Kim;Jaeeun Jang;Kyoung-Rog Lee;Jihee Lee;Gyeonghoon Kim;Hoi-Jun Yoo;
Apparue dans: IEEE Journal of Solid-State Circuits
Date publication: 01.-2017, volume: 52, issue:1, pages: 139 - 150
Editeur: IEEE
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» A 64 $times$ 64-Pixels Digital Silicon Photomultiplier Direct TOF Sensor With 100-MPhotons/s/pixel Background Rejection and Imaging/Altimeter Mode With 0.14% Precision Up To 6 km for Spacecraft Navigation and Landing
Résumé:
This paper describes a 64 $times $ 64-pixel 3-D imager based on single-photon avalanche diodes (SPADs) for long-range applications, such as spacecraft navigation and landing. Each 60- $mu text{m}$ pixel includes eight SPADs combined as a digital silicon photomultiplier, a triggering logic for photons temporal correlation, a 250-ps 16-b time-to-digital converter, and an intensity counter, with an overall 26.5% fill factor. The sensor provides time-of-flight and intensity information even with a background intensity up to 100 MPhotons/s/pixel. The sensor can work in imaging (short range, 3-D image) and altimeter (long range, single point) modes, achieving up to 300-m and 6-km maximum distance with <0.2-m and <0.5-m precision, respectively, consuming less than 100 mW.
Auteurs: Matteo Perenzoni;Daniele Perenzoni;David Stoppa;
Apparue dans: IEEE Journal of Solid-State Circuits
Date publication: 01.-2017, volume: 52, issue:1, pages: 151 - 160
Editeur: IEEE
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» A 650 V Super-Junction MOSFET With Novel Hexagonal Structure for Superior Static Performance and High BV Resilience to Charge Imbalance: A TCAD Simulation Study
Résumé:
A superjunction MOSFET (SJ-MOSFET) with a new fully close-packed hexagonal pattern for its superjunction (SJ) region is proposed. According to TCAD simulation, the proposed device can accommodate highly doped n-pillars with no significant degradation of its blocking voltage (BV), where its conventional counterpart, a SJ-MOSFET with a stripe-patterned SJ region is incapable of. In comparison with the conventional device, the proposed device shows dramatic reduction of ON-resistance down by 41% while keeping its BV of 650 V. The proposed device also shows superior BV resilience to charge imbalance than the conventional device.
Auteurs: Jaehoon Park;Jong-Ho Lee;
Apparue dans: IEEE Electron Device Letters
Date publication: 01.-2017, volume: 38, issue:1, pages: 111 - 114
Editeur: IEEE
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» A Bandpass Sampling Receiver for Wide-Bandwidth, Spectrally-Sparse Waveforms for High-Accuracy Range Measurements
Résumé:
Measuring range to millimeter accuracy using microwave wireless systems is challenging due to the need for wide-bandwidth waveforms. This work presents a Sparse Ranging Receiver (SpaRR) that utilizes spectrally-sparse waveforms and bandpass sampling to achieve high range accuracy measurements without the need for expensive wideband digitizers. The accuracy of a ranging system varies inversely with the RMS bandwidth of the waveform, and the optimal ranging waveform is one that concentrates its frequency content at the edges of its bandwidth. The SpaRR utilizes widely separate two-tone waveforms from L to X band to achieve high range accuracy with a low-speed digitizer. The theory, architecture, and signal processing associated with the SpaRR are presented, and measurements are shown demonstrating accuracies on the order of $100~mu text {m}$ for tone separations on the order of 2 GHz.
Auteurs: Thomas M. Comberiate;Robert L. Schmid;Jason E. Hodkin;Matthew D. Sharp;Jeffrey A. Nanzer;
Apparue dans: IEEE Microwave and Wireless Components Letters
Date publication: 01.-2017, volume: 27, issue:1, pages: 88 - 90
Editeur: IEEE
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» A Bayesian Method for Localization by Multistatic Active Sonar
Résumé:
The question of localizing a target with multistatic active sonar is reexamined from the perspective of finding a peak in a probability distribution function. The probability distribution function is constructed using straightforward Bayesian principles. Both a position estimate and a covariance matrix can be found, provided that an implementation of a numerical algorithm for finding a local maximum is available. The localization method developed herein can account for transmitter and receiver location errors, sound-speed errors, time errors, and bearing errors. A Monte Carlo test is conducted to compare the accuracy of the proposed method to that of a more conventional method used as a baseline. In each iteration, a transmitter, several receivers, and a target are positioned randomly within a square region, and the target is localized by both methods. The proposed method is generally more accurate than the baseline method, within the range of parameters considered here. The degree of improvement over the baseline is greater with a larger region area, with a larger bearing measurement error, and with a smaller time-of-arrival measurement error, and slightly greater with a larger number of receivers.
Auteurs: Daniel J. Peters;
Apparue dans: IEEE Journal of Oceanic Engineering
Date publication: 01.-2017, volume: 42, issue:1, pages: 135 - 142
Editeur: IEEE
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» A Bayesian Nonparametric Model for Disease Subtyping: Application to Emphysema Phenotypes
Résumé:
We introduce a novel Bayesian nonparametric model that uses the concept of disease trajectories for disease subtype identification. Although our model is general, we demonstrate that by treating fractions of tissue patterns derived from medical images as compositional data, our model can be applied to study distinct progression trends between population subgroups. Specifically, we apply our algorithm to quantitative emphysema measurements obtained from chest CT scans in the COPDGene Study and show several distinct progression patterns. As emphysema is one of the major components of chronic obstructive pulmonary disease (COPD), the third leading cause of death in the United States [1], an improved definition of emphysema and COPD subtypes is of great interest. We investigate several models with our algorithm, and show that one with a\ge , pack~\year s (a measure of cigarette exposure), and smok\ing~status as predictors gives the best compromise between estimated predictive performance and model complexity. This model identified nine subtypes which showed significant associations to seven single nucleotide polymorphisms (SNPs) known to associate with COPD. Additionally, this model gives better predictive accuracy than multiple, multivariate ordinary least squares regression as demonstrated in a five-fold cross validation analysis. We view our subtyping algorithm as a contribution that can be applied to bridge the gap between CT-level assessment of tissue composition to population-level analysis of compositional trends that vary between disease subtypes.
Auteurs: James C. Ross;Peter J. Castaldi;Michael H. Cho;Junxiang Chen;Yale Chang;Jennifer G. Dy;Edwin K. Silverman;George R. Washko;Raúl San José Estépar;
Apparue dans: IEEE Transactions on Medical Imaging
Date publication: 01.-2017, volume: 36, issue:1, pages: 343 - 354
Editeur: IEEE
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» A Better Balun? Done The Design of a 4:1 Wideband Balun Using a Parallel-Connected Transmission-Line Balun
Résumé:
This article presents a 4:1 wide-band balun that won the student design competition for wide-band baluns held during the 2016 IEEE Microwave Theory and Techniques Society (MTT-S) International Microwave Symposium (IMS2016) in San Francisco, California. For this contest, sponsored by Technical Committee MTT-17, participants were required to implement and evaluate their own baluns, with the winning entry achieving the widest bandwidth while satisfying the conditions of the competition rules during measurements at IMS2016. Some of the conditions were revised for this year's competition compared with previous competitions as follows.
Auteurs: Hansik Oh;Wooseok Lee;Hwiseob Lee;Hyungmo Koo;Sungjae Oh;Keum Choel Hwang;Kang-Yoon Lee;Cheon-seok Park;Youngoo Yang;
Apparue dans: IEEE Microwave Magazine
Date publication: 01.-2017, volume: 18, issue:1, pages: 85 - 90
Editeur: IEEE
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» A Bias-Bounded Digital True Random Number Generator Architecture
Résumé:
Bias phenomenon has been a ubiquitous problem in the designs of digital True Random Number Generator (TRNG). Circuit performance can be improved with some auxiliary modules such as analog circuits and post-processing components, which usually involve the compromising of cost, compatibility, throughput, and security as well. In some cases only sub-optimal designs can be achieved. In this paper, by utilizing the diverse timing characteristics of different initial states, a staged-running Self-timed Ring (STR) architecture, which is able to suppress the degree of bias, is proposed. The proposed architecture is compared with some conventional free-running architectures using a Xilinx Zynq-7000 Field Programmable Gate Array (FPGA) platform for a throughput of 100 Mbps. With the increase of the ring size, the bias degree of the newly proposed structure is within a negligible level of less than 1%; whereas those of the conventional architectures can exceed 10%. Statistical tests were also conducted and the results show that the quality of randomness rises as the complexity in initial-state mapping and the ring nodes of the proposed structure increases. The test passes the National Institute of Standards and Technology (NIST) test suite with high p-values.
Auteurs: Yao Liu;Ray C. C. Cheung;Hei Wong;
Apparue dans: IEEE Transactions on Circuits and Systems I: Regular Papers
Date publication: 01.-2017, volume: 64, issue:1, pages: 133 - 144
Editeur: IEEE
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» A Charge-Plasma-Based Dielectric-Modulated Junctionless TFET for Biosensor Label-Free Detection
Résumé:
To reduce the fabrication complexity and cost of the nanoscale devices, a charge-plasma concept is introduced for the first time to implement a dielectric-modulated junctionless tunnel field-effect transistor (DM-JLTFET) for biosensor label-free detection. The formation of p+ source and n+ drain regions in DM-JLTFET is done by the deposition of platinum (work function = 5.93 eV) and hafnium (work function = 3.9 eV) materials, respectively, over the silicon body. Furthermore, a nanogap cavity embedded within the gate dielectric is created by etching the portion of gate oxide layer toward the source end for sensing biomolecules. For this, the sensing capability of DM-JLTFET has been investigated in terms of variation in dielectric constant, charge density, length, and thickness of the cavity at different bias conditions. Finally, a comparative study between DM-JLTFET and MOSFET biosensor is investigated. The implementation of proposed device and all the simulations have been performed by using ATLAS device simulator.
Auteurs: Deepika Singh;Sunil Pandey;Kaushal Nigam;Dheeraj Sharma;Dharmendra Singh Yadav;Pravin Kondekar;
Apparue dans: IEEE Transactions on Electron Devices
Date publication: 01.-2017, volume: 64, issue:1, pages: 271 - 278
Editeur: IEEE
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» A Class of 1-Bit Multi-Step Look-Ahead $Sigma $ - $Delta $ Modulators
Résumé:
Digital Multi-Step Look-Ahead (MSLA) 1-bit $Sigma $ - $Delta $ modulators are introduced. They improve upon the stability and noise shaping characteristics of conventional 1-bit $Sigma $ - $Delta $ modulators by minimizing quantization error metrics of the current and future output samples. The mathematical model of the proposed MSLA modulators is analyzed. It is shown that the MSLA modulators are equivalent to a system of conventional $Sigma $ - $Delta $ modulators in parallel, but with a common multi-input 1-bit quantizer instead of a typical one. The properties of this multi-input quantizer are studied and the transfer functions of the MSLA modulators are derived. Simulation results are presented demonstrating the advantages of the MSLA modulators over conventional 1-bit $Sigma $ - $Delta $ ones in a number of applications. A parametric hardware architecture of the MSLA modulators is presented offering an adjustable trade-off between performance and hardware complexity based on the number of look-ahead steps. Finally, a FPGA implementation of a MSLA modulator is presented along with simulation results.
Auteurs: Charis Basetas;Thanasis Orfanos;Paul P. Sotiriadis;
Apparue dans: IEEE Transactions on Circuits and Systems I: Regular Papers
Date publication: 01.-2017, volume: 64, issue:1, pages: 24 - 37
Editeur: IEEE
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» A Class of Non-Linearly Solvable Networks
Résumé:
For each positive composite integer  m , a network is constructed, which is solvable over an alphabet of size  m but is not solvable over any smaller alphabet. These networks have no linear solutions over any module alphabets and are not asymptotically linearly solvable over any finite-field alphabets. The networks’ capacities are all shown to equal one, and their linear capacities are all shown to be bounded away from one for all finite-field alphabets. In addition, if  m is a non-power-of-prime composite number, then such a network is not solvable over any prime-power-size alphabet.
Auteurs: Joseph Connelly;Kenneth Zeger;
Apparue dans: IEEE Transactions on Information Theory
Date publication: 01.-2017, volume: 63, issue:1, pages: 201 - 229
Editeur: IEEE
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» A Clustering Approach to Learning Sparsely Used Overcomplete Dictionaries
Résumé:
We consider the problem of learning overcomplete dictionaries in the context of sparse coding, where each sample selects a sparse subset of dictionary elements. Our main result is a strategy to approximately recover the unknown dictionary using an efficient algorithm. Our algorithm is a clustering-style procedure, where each cluster is used to estimate a dictionary element. The resulting solution can often be further cleaned up to obtain a high accuracy estimate, and we provide one simple scenario where \ell _{1} -regularized regression can be used for such a second stage.
Auteurs: Alekh Agarwal;Animashree Anandkumar;Praneeth Netrapalli;
Apparue dans: IEEE Transactions on Information Theory
Date publication: 01.-2017, volume: 63, issue:1, pages: 575 - 592
Editeur: IEEE
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» A CMOS Pixel With Embedded ADC, Digital CDS and Gain Correction Capability for Massively Parallel Imaging Array
Résumé:
In the paper, a CMOS pixel has been proposed for imaging arrays with massively parallel image acquisition and simultaneous compensation of dark signal nonuniformity (DSNU) as well as photoresponse nonuniformity (PRNU). In our solution the pixel contains all necessary functional blocks: a photosensor and an analog-to-digital converter (ADC) with built-in correlated double sampling (CDS) integrated together. It is implemented in standard $0.18~mu text {m}$ CMOS technology. The size of the pixel with 9-bit resolution is $21~mu text {m},,times 21,,mu text {m}$ . Measurements of the $128times 128$ pixel array confirm functionality of the proposed solution. CDS reduces dark FPN from 12 LSB (3%) to 0.8 LSB (0.2%) and light FPN from 14 LSB (3.7%) to 7 LSB (1.8%). Further reduction of the light FPN (to ~1 LSB) was achieved by compensating PRNU using massively parallel innovative digital multiplication which features good resolution (1/511), does not disturb CDS executed at the same time, and can be implemented within a small pixel area.
Auteurs: M. Kłosowski;W. Jendernalik;J. Jakusz;G. Blakiewicz;S. Szczepański;
Apparue dans: IEEE Transactions on Circuits and Systems I: Regular Papers
Date publication: 01.-2017, volume: 64, issue:1, pages: 38 - 49
Editeur: IEEE
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» A Colorimetric CMOS-Based Platform for Rapid Total Serum Cholesterol Quantification
Résumé:
Elevated cholesterol levels are associated with a greater risk of developing cardiovascular disease and other illnesses, making it a prime candidate for detection on a disposable biosensor for rapid point of care diagnostics. One of the methods to quantify cholesterol levels in human blood serum uses an optically mediated enzyme assay and a bench top spectrophotometer. The bulkiness and power hungry nature of the equipment limits its usage to laboratories. Here, we present a new disposable sensing platform that is based on a complementary metal oxide semiconductor process for total cholesterol quantification in pure blood serum. The platform that we implemented comprises readily mass-manufacturable components that exploit the colorimetric changes of cholesterol oxidase and cholesterol esterase reactions. We have shown that our quantification results are comparable to that obtained by a bench top spectrophotometer. Using the implemented device, we have measured cholesterol concentration in human blood serum as low as 29 \mu text{M} with a limit of detection at 13 \mu text{M} , which is approximately 400 times lower than average physiological range, implying that our device also has the potential to be used for applications that require greater sensitivity.
Auteurs: Mohammed A. Al-Rawhani;Boon Chong Cheah;Alasdair Iain Macdonald;Christopher Martin;Chunxiao Hu;James Beeley;Luiz Carlos Gouveia;James P. Grant;Gordon Campbell;Michael P. Barrett;David R. S. Cumming;
Apparue dans: IEEE Sensors Journal
Date publication: 01.-2017, volume: 17, issue:2, pages: 240 - 247
Editeur: IEEE
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» A Compact 60W X-Band GaN HEMT Power Amplifier MMIC
Résumé:
The design and performance of a compact X-band power amplifier MMIC utilizing Nanjing Electronic Devices Institute’s (NEDI’s) $0.25~mu text {m}$ gallium nitride (GaN) high electron mobility transistor (HEMT) technology is presented. The MMIC operates in pulse conditions with typical pulse width of $100~mu $ sec and 10% duty cycle. An output power of 47.5 dBm to 48.7 dBm with over 20 dB power gain and a power added efficiency (PAE) of 40% to 45% over the band of 8-12 GHz under a drain voltage of 28 V have been achieved. The chip size is $3.5times 3.8$ mm2 and the amplifier delivers an output power density up to 5.57 W/mm2 over the chip area and up to 6.43 W/mm over the active periphery of the power stage. The thermal resistance is 1.7 °C/W measured in CW mode.
Auteurs: Hong-Qi Tao;Wei Hong;Bin Zhang;Xu-Ming Yu;
Apparue dans: IEEE Microwave and Wireless Components Letters
Date publication: 01.-2017, volume: 27, issue:1, pages: 73 - 75
Editeur: IEEE
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» A Compact Dual-Circularly Polarized Cavity-Backed Ring-Slot Antenna
Résumé:
A low profile dual-circularly polarized printed ring-slot antenna with a small footprint, which radiates above an open cavity loaded with an artificial magnetic conducting reflector, is presented. The feed network consists of two T-shaped capacitive feed structures connected to a miniaturized hybrid branch-line coupler. Experimental results for a final antenna design (with a size of 0.5\lambda _{math\rm {math\bf {0}}} \quad \times 0.5\lambda _{math\rm {math\bf {0}}} \quad \times 0.057\lambda _{math\rm {math\bf {0}}} ) show a 4% isolation bandwidth between the two ports of the dual-circularly polarized antenna and a maximum gain of approximately 6.8 dBic. Good front-to-back ratios and low cross-polarization were achieved. These very compact and low profile antennas are suitable for 2.4 GHz wireless local area network (WLAN) communication systems.
Auteurs: Riaan Ferreira;Johan Joubert;Johann W. Odendaal;
Apparue dans: IEEE Transactions on Antennas and Propagation
Date publication: 01.-2017, volume: 65, issue:1, pages: 364 - 368
Editeur: IEEE
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» A Comparative Study of the Very Early Age Cement Hydration Monitoring Using Compressive and Shear Mode Smart Aggregates
Résumé:
The load-bearing capacity of concrete is highly influenced by the initial cement hydration process, especially in its very early age (0–48 h). Due to the rapid and intense chemical reactions between the cement and the water in the very early hydration process, it is still a challenge to monitor the cement hydration process in real time. In this paper, we investigated a stress wave-based active sensing method to monitor the cement hydration process using piezoceramic-based transducers, called smart aggregates. Using different types of the embedded piezoceramic patches, including text{d}_{33} and text{d}_{15} modes, smart aggregates can function as both the compressive and shear wave transmitters and receivers. In each mode of the smart aggregate, the active sensing approach that uses a pair of smart aggregates, one as a wave transmitter and the other one as a wave receiver, was employed. A comparative study was conducted to investigate the performance of monitoring the very early age cement hydration process by using compressive wave (P-wave) and shear wave (S-wave). A frequency domain analysis of the received signal was performed during the very early age cement hydration process. Experimental results reveal the differences of the received signal strength, valid monitoring period, and the effective frequency range by using both P-wave and S-wave.
Auteurs: Qingzhao Kong;Gangbing Song;
Apparue dans: IEEE Sensors Journal
Date publication: 01.-2017, volume: 17, issue:2, pages: 256 - 260
Editeur: IEEE
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» A Computational Model of the Electric Field Distribution due to Regional Personalized or Nonpersonalized Electrodes to Select Transcranial Electric Stimulation Target
Résumé:
Objective: A procedure to personalize the electrode to stimulate specific cortical regions by transcranial electric stimulations has been recently proposed. This study aims to assess the distribution of the electric field (E) induced by tES via the personalized (RePE) and the nonpersonalized (ReNPE) electrode. Methods: We used two anatomical models on which we shaped and placed the RePE, based on brain anatomy, and the ReNPE to target the bilateral primary motor (M1) or somatosensory cortex (S1) with the reference on the occipital area in both cases. The effect of shifts of the ReNPE position has been also evaluated. Results: The RePE induced higher E peak and median values than the ReNPE along the bilateral primary motor sensory cortices, up to their lateral regions, on a great percentage of volume of these cortices along all their extent. The shift of the ReNPE electrode toward the inion still induced higher E peak and median values than the ReNPE not shifted, but less than the RePE, mainly in the central region and, in a lower percentage of volume, in the lateral regions of these cortices. Conclusion: The E distributions induced for both targets (M1 and S1) by the RePE are different from the ones due to the ReNPE, along the whole extent of the bilateral primary sensorimotor cortices. The shift in the ReNPE positioning can modify the E distributions mainly in the more central region of these cortices. Significance: These results strengthen the suitability of personalized electrodes in targeting extended cortical regions.
Auteurs: Marta Parazzini;Serena Fiocchi;Andrea Cancelli;Carlo Cottone;Ilaria Liorni;Paolo Ravazzani;Franca Tecchio;
Apparue dans: IEEE Transactions on Biomedical Engineering
Date publication: 01.-2017, volume: 64, issue:1, pages: 184 - 195
Editeur: IEEE
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» A Construction of Linear Codes Over ${mathbb {F}}_{2^t}$ From Boolean Functions
Résumé:
In this paper, we present a construction of linear codes over ${mathbb {F}}_{2^{t}}$ from Boolean functions, which is a generalization of Ding’s method. Based on this construction, we give two classes of linear codes $tilde { {mathcal {C}}}_{f}$ and ${mathcal {C}}_{f}$ over ${mathbb {F}}_{2^{t}}$ from a Boolean function $f: {mathbb {F}}_{q}rightarrow {mathbb {F}} _{2}$ , where $q=2^{n}$ and ${mathbb {F}}_{2^{t}}$ is some subfield of ${mathbb {F}}_{q}$ . The complete weight enumerator of $tilde { {mathcal {C}}}_{f}$ can be easily determined from the Walsh spectrum of $f$ , while the weight distribution of the code ${mathcal {C}}_{f}$ can also be easily settled. Particularly, the number of nonzero weights of $tilde { {mathcal {C}}}_{f}$ and ${mathcal {C}}_{f}$ is the same as the number of distinct Walsh values of $f$ . As applications of this construction, we show several series of linear codes over ${mathbb {F}}_{2^{t}}$ with two or three weights by using bent, semibent, monomial and quadratic Boolean function $f$ .
Auteurs: Can Xiang;Keqin Feng;Chunming Tang;
Apparue dans: IEEE Transactions on Information Theory
Date publication: 01.-2017, volume: 63, issue:1, pages: 169 - 176
Editeur: IEEE
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» A Coordinate Control Strategy for Circulating Current Suppression in Multiparalleled Three-Phase Inverters
Résumé:
This paper addresses the zero-sequence circulating current control in the multiparalleled three-phase voltage-source inverters. The model of the zero-sequence circulating current in the N-paralleled ({N;\geq ;3}) inverters is derived. It is shown that the circulating current is not only susceptible to the mismatches of circuit parameters, but it is also influenced by the interactions of circulating current controllers used by other paralleled inverters. To eliminate these adverse effects on the circulating current control loop, a coordinate control strategy for the N-paralleled inverter is proposed based on the zero-vector feedforward method with the space-vector pulse width modulation. Moreover, a virtual inverter method is introduced to facilitate the implementation of the proposed controller, which decouples the interactions of circulating current controllers in the paralleled inverters. Finally, experimental results obtained from three-paralleled, grid-connected inverters validate the effectiveness of theoretical analysis and proposed approach. An effective mitigation of the circulating current is demonstrated for the paralleled inverters under the unequal operating conditions.
Auteurs: Xueguang Zhang;Tianyi Wang;Xiongfei Wang;Gaolin Wang;Zhe Chen;Dianguo Xu;
Apparue dans: IEEE Transactions on Industrial Electronics
Date publication: 01.-2017, volume: 64, issue:1, pages: 838 - 847
Editeur: IEEE
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» A Data-Driven Approach to Improve Wind Dispatchability
Résumé:
Wind power has been treated as a non-dispatchable resource until recent development of active wind dispatch strategies in several electricity markets. In markets such as ISO New England, a dispatch range for each wind farm is determined based on security analysis. Wind power will be fully absorbed unless it is out of the ranges. This approach, though aiming at improving wind utilization with system security considered, relies solely on wind power forecasting, which could be inaccurate by nature, and might result in unnecessary wind curtailment. In our work, we recognize the discrepancy between wind power forecast and the actual wind power dispatched and develop a data-driven approach to better capture the uncertainties in wind power dispatch. The computational experiments demonstrate that the dispatch ranges determined by our data-driven approach can dispatch more wind without endangering the system security and that solution is also efficient.
Auteurs: Feng Qiu;Zhigang Li;Jianhui Wang;
Apparue dans: IEEE Transactions on Power Systems
Date publication: 01.-2017, volume: 32, issue:1, pages: 421 - 429
Editeur: IEEE
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» A Data-Driven Learning Approach for Nonlinear Process Monitoring Based on Available Sensing Measurements
Résumé:
A data-driven learning approach is proposed to monitor nonlinear processes based only on the available sensing measurements in this paper. To achieve this aim, locally weighted projection regression (LWPR) is used to establish the model of the underlying nonlinear process with local linear models, in which the modified principal component analysis (MPCA) could be further applied for process monitoring. Moreover, the normalized weighted mean of all the proposed test statistics is employed to detect the possible abnormalities. A detailed discussion is made on principal-component-analysis-based approaches as well as on the reason of selecting MPCA under LWPR framework. The Tennessee Eastman process is first employed to demonstrate the superiority of MPCA. A numerical simulation example and an industrial benchmark of an autosuspension system are finally utilized to validate the effectiveness of the proposed scheme.
Auteurs: Shen Yin;Chengming Yang;Jingxin Zhang;Yuchen Jiang;
Apparue dans: IEEE Transactions on Industrial Electronics
Date publication: 01.-2017, volume: 64, issue:1, pages: 643 - 653
Editeur: IEEE
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» A Direct Method for the Estimation of Sediment Sound Speed With a Horizontal Array in Shallow Water
Résumé:
In this paper, a fast approach for estimating sediment sound speed in a shallow-water environment is developed. Under certain assumptions, this algorithm recovers the seabed sound-speed profile using pressure field measurements at low frequencies. The geometry of the problem involves measuring the pressure at horizontally placed hydrophones in the water column. The Deift–Trubowitz integral equation is then solved. This work introduces two methods for this task. The first is a modified Born approximation that builds upon a standard first-order approximation; the second is based on interpolating the integrand. It is shown with synthetic data that these methods work well with successful sound-speed estimation and identification of sharp discontinuities in sound speed. Although the methods are stable and effective with noise-free data, problems arise when noise contaminates the acoustic field. Regularization approaches, reducing the disruptive effect of singular points and smoothing a measured reflection coefficient, are developed to remedy this problem, leading to improved results in noisy environments. In addition to providing sound-speed estimates, the method also computes sediment thickness. This feature is of particular interest, since it makes the method suitable as a preprocessing step providing useful information to other inversion methods. Sensitivity analyses demonstrate that some assumptions required for the approach implementation are not restrictive.
Auteurs: Tao Lin;Zoi-Heleni Michalopoulou;
Apparue dans: IEEE Journal of Oceanic Engineering
Date publication: 01.-2017, volume: 42, issue:1, pages: 208 - 218
Editeur: IEEE
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» A Discriminatively Trained Fully Connected Conditional Random Field Model for Blood Vessel Segmentation in Fundus Images
Résumé:
Goal: In this work, we present an extensive description and evaluation of our method for blood vessel segmentation in fundus images based on a discriminatively trained fully connected conditional random field model. Methods: Standard segmentation priors such as a Potts model or total variation usually fail when dealing with thin and elongated structures. We overcome this difficulty by using a conditional random field model with more expressive potentials, taking advantage of recent results enabling inference of fully connected models almost in real time. Parameters of the method are learned automatically using a structured output support vector machine, a supervised technique widely used for structured prediction in a number of machine learning applications. Results: Our method, trained with state of the art features, is evaluated both quantitatively and qualitatively on four publicly available datasets: DRIVE, STARE, CHASEDB1, and HRF. Additionally, a quantitative comparison with respect to other strategies is included. Conclusion: The experimental results show that this approach outperforms other techniques when evaluated in terms of sensitivity, F1-score, G-mean, and Matthews correlation coefficient. Additionally, it was observed that the fully connected model is able to better distinguish the desired structures than the local neighborhood-based approach. Significance: Results suggest that this method is suitable for the task of segmenting elongated structures, a feature that can be exploited to contribute with other medical and biological applications.
Auteurs: José Ignacio Orlando;Elena Prokofyeva;Matthew B. Blaschko;
Apparue dans: IEEE Transactions on Biomedical Engineering
Date publication: 01.-2017, volume: 64, issue:1, pages: 16 - 27
Editeur: IEEE
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» A Distributed Networked Approach for Fault Detection of Large-Scale Systems
Résumé:
Networked systems present some key new challenges in the development of fault-diagnosis architectures. This paper proposes a novel distributed networked fault detection methodology for large-scale interconnected systems. The proposed formulation incorporates a synchronization methodology with a filtering approach in order to reduce the effect of measurement noise and time delays on the fault detection performance. The proposed approach allows the monitoring of multirate systems, where asynchronous and delayed measurements are available. This is achieved through the development of a virtual sensor scheme with a model-based resynchronization algorithm and a delay compensation strategy for distributed fault-diagnostic units. The monitoring architecture exploits an adaptive approximator with learning capabilities for handling uncertainties in the interconnection dynamics. A consensus-based estimator with time-varying weights is introduced, for improving fault detectability in the case of variables shared among more than one subsystem. Furthermore, time-varying threshold functions are designed to prevent false-positive alarms. Analytical fault detectability sufficient conditions are derived, and extensive simulation results are presented to illustrate the effectiveness of the distributed fault detection technique.
Auteurs: Francesca Boem;Riccardo M. G. Ferrari;Christodoulos Keliris;Thomas Parisini;Marios M. Polycarpou;
Apparue dans: IEEE Transactions on Automatic Control
Date publication: 01.-2017, volume: 62, issue:1, pages: 18 - 33
Editeur: IEEE
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» A Distributionally Robust Linear Receiver Design for Multi-Access Space-Time Block Coded MIMO Systems
Résumé:
A receiver design problem for multi-access space-time block coded multiple-input multiple-output systems is considered. To hedge the mismatch between the true and the estimated channel state information (CSI), several robust receivers have been developed in the past decades. Among these receivers, the Gaussian robust receiver has been shown to be superior in performance. This receiver is designed based on the assumption that the CSI mismatch has Gaussian distribution. However, in real-world applications, the assumption of Guassianity might not hold. Motivated by this fact, a more general distributionally robust receiver is proposed in this paper, where only the mean and the variance of the CSI mismatch distribution are required in the receiver design. A tractable semi-definite programming (SDP) reformulation of the robust receiver design is developed. To suppress the self-interferences, a more advanced distributionally robust receiver is proposed. A tight convex approximation is given and the corresponding tractable SDP reformulation is developed. Moreover, for the sake of easy implementation, we present a simplified distributionally robust receiver. Simulations results are provided to show the effectiveness of our design by comparing with some existing well-known receivers.
Auteurs: Bin Li;Yue Rong;Jie Sun;Kok Lay Teo;
Apparue dans: IEEE Transactions on Wireless Communications
Date publication: 01.-2017, volume: 16, issue:1, pages: 464 - 474
Editeur: IEEE
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» A Distributionally Robust Optimization Model for Unit Commitment Considering Uncertain Wind Power Generation
Résumé:
This paper proposes a distributionally robust optimization model for solving unit commitment (UC) problems considering volatile wind power generation. The uncertainty of wind power is captured by an ambiguity set that defines a family of wind power distributions, and the expected total cost under the worst-case distribution is minimized. Compared with stochastic programming, this method may have less dependence on the data of exact probability distributions. It should also outperform the conventional robust optimization methods because some distribution information can be incorporated into the ambiguity sets to generate less conservative results. In this paper, the UC model is formulated based on the typical two-stage framework, where the UC decisions are determined in a here-and-now manner, and the economic dispatch decisions are assumed to be wait-and-see, made after the observation of wind power outcomes. For computational tractability, the wait-and-see decisions are addressed by linear decision rule approximation, assuming that the economic dispatch decisions affinely depend on uncertain parameters as well as auxiliary random variables introduced to describe distributional characteristics of wind power generation. It is shown in case studies that this decision rule model tends to provide a tight approximation to the original two-stage problem, and the performance of UC solutions may be greatly improved by incorporating information on wind power distributions into the robust model.
Auteurs: Peng Xiong;Panida Jirutitijaroen;Chanan Singh;
Apparue dans: IEEE Transactions on Power Systems
Date publication: 01.-2017, volume: 32, issue:1, pages: 39 - 49
Editeur: IEEE
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» A Domain Specific Approach to High Performance Heterogeneous Computing
Résumé:
Users of heterogeneous computing systems face two problems: first, in understanding the trade-off relationships between the observable characteristics of their applications, such as latency and quality of the result, and second, how to exploit knowledge of these characteristics to allocate work to distributed computing platforms efficiently. A domain specific approach addresses both of these problems. By considering a subset of operations or functions, models of the observable characteristics or domain metrics may be formulated in advance, and populated at run-time for task instances. These metric models can then be used to express the allocation of work as a constrained integer program. These claims are illustrated using the domain of derivatives pricing in computational finance, with the domain metrics of workload latency and pricing accuracy. For a large, varied workload of 128 Black-Scholes and Heston model-based option pricing tasks, running upon a diverse array of 16 Multicore CPUs, GPUs and FPGAs platforms, predictions made by models of both the makespan and accuracy are generally within 10 percent of the run-time performance. When these models are used as inputs to machine learning and MILP-based workload allocation approaches, a latency improvement of up to 24 and 270 times over the heuristic approach is seen.
Auteurs: Gordon Inggs;David B. Thomas;Wayne Luk;
Apparue dans: IEEE Transactions on Parallel and Distributed Systems
Date publication: 01.-2017, volume: 28, issue:1, pages: 2 - 15
Editeur: IEEE
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» A Dopingless FET With Metal–Insulator–Semiconductor Contacts
Résumé:
By adopting the charge-plasma concept, dopingless FETs with metal-semiconductor and metal–insulator–semiconductor (MIS) contacts in parallel at the source/drain (SD) have been studied in this letter. Currents are found to flow mainly through the MIS contacts for a given SD metal workfunction when the insulator thickness is thin enough. In order to avoid the possible penalty caused by Fermi level pinning, the dopingless FET with only SD MIS contacts has been proposed as well. The impacts of insulator material parameters, such as bandgap, electron affinity, dielectric constant, and physical thickness, on the electrical characteristics of the dopingless FET have been investigated systematically. Based on numerical simulations, this letter provides a general guideline with physical insights for designing dopingless FETs with high-permittivity insulator at the SD MIS contacts.
Auteurs: Kuo-Hsing Kao;Liang-Yu Chen;
Apparue dans: IEEE Electron Device Letters
Date publication: 01.-2017, volume: 38, issue:1, pages: 5 - 8
Editeur: IEEE
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» A Dual-Band Feed Network for Series-Fed Antenna Arrays Using Extended Composite Right/Left-Handed Transmission Lines
Résumé:
In this paper, extended composite right/left-handed (E-CRLH) structures are studied to design multiband microwave devices. As an example, a three-way series power divider (SPD) is designed. The overall effects of the E-CRLH structures, as the feeding networks of the antenna arrays, on the antenna arrays main-beam variations are investigated. We also design and implement two antenna arrays with N=3 elements and the same interelement distances each fed by a distinct three-way SPD. The radiation patterns of the antennas are examined. Simulation and measurement results demonstrate that the desired main-beam squinting of the antenna array could be obtained by engineering the parameters of the feeding network instead of adjusting the interelement distances.
Auteurs: Mohammad Bemani;Saeid Nikmehr;Mahdi Fozi;
Apparue dans: IEEE Transactions on Antennas and Propagation
Date publication: 01.-2017, volume: 65, issue:1, pages: 178 - 189
Editeur: IEEE
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» A Dual-Buck–Boost AC/DC Converter for DC Nanogrid With Three Terminal Outputs
Résumé:
Due to the widely used dc characterized loads and more distributed power generation sources, the dc nanogrid becomes more and more popular, and it is seen as an alternative to the ac grid. For safety considerations, the dc nanogrid should provide reliable grounding for the residential loads such as the low-voltage ac power system. There are three typical grounding configurations for a dc nanogrid: the united grounding, the unidirectional grounding, and the virtual isolated grounding. Each grounding configuration has its own specifications to ac/dc converters. In this paper, a dual-buck–boost ac/dc converter for use in the united-grounding-configuration-based dc nanogrid with three terminal outputs is proposed. The working principle of this converter is presented in detail through analyzing the equivalent circuits. Experiments are carried out to verify the theoretical analysis.
Auteurs: Weimin Wu;Houqing Wang;Yuan Liu;Min Huang;Frede Blaabjerg;
Apparue dans: IEEE Transactions on Industrial Electronics
Date publication: 01.-2017, volume: 64, issue:1, pages: 295 - 299
Editeur: IEEE
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» A Dynamic Model and Control Method for a Two-Axis Inertially Stabilized Platform
Résumé:
To realize high-performance control for a two-axis inertially stabilized platform (ISP), a nonlinear dynamic model based on the geographic coordinate and a compound control method based on the back-stepping sliding mode control and adaptive radial basis function neural network (RBFNN) are proposed. Compared with the traditional dynamic model based on the inertial coordinate, the nonlinear dynamic model based on the geographic coordinate constructs the direct relationship among the control inputs and criteria of the ISP. Moreover, the back-stepping sliding mode control method is proposed to handle the system nonlinearity, parameter variations, and disturbances. Furthermore, the adaptive RBFNN is constructed and optimized to estimate the upper bound of the residual error on line to reduce the chatting phenomenon. The asymptotic stability of the proposed control method has been proven by the Lyapunov stability theory. The effectiveness of the proposed method is validated by a series of simulations and flight tests.
Auteurs: Fei Dong;Xusheng Lei;Wusheng Chou;
Apparue dans: IEEE Transactions on Industrial Electronics
Date publication: 01.-2017, volume: 64, issue:1, pages: 432 - 439
Editeur: IEEE
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» A Dynamic-Bayesian-Network-Based Fault Diagnosis Methodology Considering Transient and Intermittent Faults
Résumé:
Transient fault (TF) and intermittent fault (IF) of complex electronic systems are difficult to diagnose. As the performance of electronic products degrades over time, the results of fault diagnosis could be different at different times for the given identical fault symptoms. A dynamic Bayesian network (DBN)-based fault diagnosis methodology in the presence of TF and IF for electronic systems is proposed. DBNs are used to model the dynamic degradation process of electronic products, and Markov chains are used to model the transition relationships of four states, i.e., no fault, TF, IF, and permanent fault. Our fault diagnosis methodology can identify the faulty components and distinguish the fault types. Four fault diagnosis cases of the Genius modular redundancy control system are investigated to demonstrate the application of this methodology.
Auteurs: Baoping Cai;Yu Liu;Min Xie;
Apparue dans: IEEE Transactions on Automation Science and Engineering
Date publication: 01.-2017, volume: 14, issue:1, pages: 276 - 285
Editeur: IEEE
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» A Dynamics Perspective of Pursuit-Evasion: Capturing and Escaping When the Pursuer Runs Faster Than the Agile Evader
Résumé:
Pursuit-evasion is fascinating in both nature and artificial world. Typically, a pursuer runs faster than its targeted evader while with less agile maneuverability. Naturally, there is a wonder that how an evader escapes from a faster pursuer or how faster a pursuer is able to capture an agile evader? This is not yet answered from the dynamics (i.e., Lagrangian or Newtonian) perspective. In this paper, we first provide a concise dynamics formulation from a bio-inspired perspective, in which the evader's escape strategy consists of two simplest possible yet efficient ingredients integrated as an organic whole, i.e., the suddenly turning-left or turning-right propelling maneuver, together with the early alert condition for starting and maintaining this maneuver. Then, we characterize the dynamic properties of the system at two different levels: 1) the maneuvers and non-trivial escape of the evader, at the level of individual runs of the system; and further 2) the non-trivial escape zones, the sharp phase-transitions and the phase-transition lines of the gaming outcome, at the level of the running results with respect to different ranges of the system parameters. The results are consistent with natural observations and may disclose some clues of natural laws, as well as imply applications in competition of autonomous mobile robots.
Auteurs: Wei Li;
Apparue dans: IEEE Transactions on Automatic Control
Date publication: 01.-2017, volume: 62, issue:1, pages: 451 - 457
Editeur: IEEE
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» A Fault Tolerance Technique for Combinational Circuits Based on Selective-Transistor Redundancy
Résumé:
With fabrication technology reaching nanolevels, systems are becoming more prone to manufacturing defects with higher susceptibility to soft errors. This paper is focused on designing combinational circuits for soft error tolerance with minimal area overhead. The idea is based on analyzing random pattern testability of faults in a circuit and protecting sensitive transistors, whose soft error detection probability is relatively high, until desired circuit reliability is achieved or a given area overhead constraint is met. Transistors are protected based on duplicating and sizing a subset of transistors necessary for providing the protection. In addition to that, a novel gate-level reliability evaluation technique is proposed that provides similar results to reliability evaluation at the transistor level (using SPICE) with the orders of magnitude reduction in CPU time. LGSynth’91 benchmark circuits are used to evaluate the proposed algorithm. Simulation results show that the proposed algorithm achieves better reliability than other transistor sizing-based techniques and the triple modular redundancy technique with significantly lower area overhead for 130-nm process technology at a ground level.
Auteurs: Ahmad T. Sheikh;Aiman H. El-Maleh;Muhammad E. S. Elrabaa;Sadiq M. Sait;
Apparue dans: IEEE Transactions on Very Large Scale Integration Systems
Date publication: 01.-2017, volume: 25, issue:1, pages: 224 - 237
Editeur: IEEE
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» A Ferrite LTCC-Based Monolithic SIW Phased Antenna Array
Résumé:
In this paper, we present a novel configuration for realizing monolithic substrate integrated waveguide (SIW)-based phased antenna arrays using Ferrite low-temperature cofired ceramic (LTCC) technology. Unlike the current common schemes for realizing SIW phased arrays that rely on surface-mount component (p-i-n diodes, etc.) for controlling the phase of the individual antenna elements, here the phase is tuned by biasing of the ferrite filling of the SIW. This approach eliminates the need for mounting of any additional RF components and enables seamless monolithic integration of phase shifters and antennas in SIW technology. As a proof of concept, a two-element slotted SIW-based phased array is designed, fabricated, and measured. The prototype exhibits a gain of 4.9 dBi at 13.2 GHz and a maximum E -plane beam-scanning of ±28° using external windings for biasing the phase shifters. Moreover, the array can achieve a maximum beam-scanning of ±19° when biased with small windings that are embedded in the package. This demonstration marks the first time a fully monolithic SIW-based phased array is realized in Ferrite LTCC technology and paves the way for future larger size implementations.
Auteurs: Ahmed Nafe;Farhan A. Ghaffar;Muhammad Fahad Farooqui;Atif Shamim;
Apparue dans: IEEE Transactions on Antennas and Propagation
Date publication: 01.-2017, volume: 65, issue:1, pages: 196 - 205
Editeur: IEEE
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» A Forward-Wave Oscillator Based on Folded-Waveguide Slow-Wave Structure
Résumé:
A new concept of oscillator based on a folded waveguide slow-wave structure (FWG SWS) is studied. The resonant cavity of the oscillator is formed by a section of FWG SWS, a length-adjustable waveguide, and a waveguide loaded by multilayer dielectric. The beam is synchronized with the forward wave on the SWS. If an FWG traveling-wave amplifier (TWA) is driven by this oscillator, there is a possibility that the amplifier and the oscillator share the same design and the same art of manufacturing and power supplier. A forward-wave oscillator based on a design of a TWA in 2-mm band is calculated by both a 1-D nonlinear code and particle-in-cell (PIC) simulation. From both the code and the simulation results, when the oscillator is 30-pitch long, the operation voltage 22000 V and the start current is 3 mA at 138 GHz. When the oscillator is 22-pitch long, operation current 15 mA, and operation voltage 22400 V, simulation result shows that the output power is 58.32 W, and the efficiency is 17.26% at 133.2GHz. When both the voltage and length of the length-adjustable waveguide are tuned, the oscillator can operate within all the first dispersion band of the SWS. If only voltage is tuned, the oscillator can oscillate at several discrete frequencies.
Auteurs: Hairong Yin;Jin Xu;Lingna Yue;Yubin Gong;Yanyu Wei;
Apparue dans: IEEE Transactions on Plasma Science
Date publication: 01.-2017, volume: 45, issue:1, pages: 24 - 29
Editeur: IEEE
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» A Fresh Look for IEEE Industry Applications Magazine [From the Editor's Desk]
Résumé:
Presents the introductory editorial for this issue of the publication.
Auteurs: Lanny Floyd;
Apparue dans: IEEE Industry Applications Magazine
Date publication: 01.-2017, volume: 23, issue:1, pages: 3 - 3
Editeur: IEEE
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» A Full-Bridge Submodule-Based Modular Unipolar/Bipolar High-Voltage Pulse Generator With Sequential Charging of Capacitors
Résumé:
Repetitive high pulsed electric field (PEF) is an effective method to kill microorganisms and bacteria in water treatment applications. The PEF can be generated by applying high-power electromagnetic pulse across the sample to be treated. There are two main types of high-voltage pulse generators, namely, unipolar and bipolar. In this paper, a full-bridge submodule-based modular high-voltage pulse generator, having the ability to generate unipolar and bipolar high-voltage pulses with different shapes from a relatively low-voltage input dc supply, is proposed. In the proposed configuration, relatively low-voltage insulated gate bipolar transistors (IGBTs) are required to generate the high-voltage bipolar pulses. A thyristor rated at the level of the pulsed output voltage is required in the proposed configuration to bypass the load during the charging process of capacitors. In the proposed approach, a thyristor is used instead of the self-commutated high-voltage switch (e.g., series-connected IGBTs), as thyristors are available with high-voltage ratings and possess inherent reverse voltage blocking capability. A detailed illustration of the proposed configuration and its operational concept are introduced in this paper. Simulation and experimental results are presented to validate the proposed approach.
Auteurs: Ahmed A. Elserougi;Ibrahim Abdelsalam;Ahmed M. Massoud;Shehab Ahmed;
Apparue dans: IEEE Transactions on Plasma Science
Date publication: 01.-2017, volume: 45, issue:1, pages: 91 - 99
Editeur: IEEE
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» A Galvanically Isolated DC–DC Converter Based on Current-Reuse Hybrid-Coupled Oscillators
Résumé:
This brief presents a fully integrated dc–dc converter consisting of only two CMOS chips, which are a power oscillator with an integrated transformer and a full-bridge rectifier. A thick inter-metal oxide layer guarantees a galvanic isolation rating as high as 5 kV. A current-reuse hybrid-coupled oscillator is proposed, which is based on a three-winding tapped isolation transformer and improves both output power and silicon area occupation with respect to previous works. The converter is operated at 5-V power supply and is able to deliver up to 300-mW dc power at 10-V output voltage while exhibiting a power density and a power efficiency of 36 mW/mm2 and 24%, respectively.
Auteurs: Nunzio Greco;Nunzio Spina;Vincenzo Fiore;Egidio Ragonese;Giuseppe Palmisano;
Apparue dans: IEEE Transactions on Circuits and Systems II: Express Briefs
Date publication: 01.-2017, volume: 64, issue:1, pages: 56 - 60
Editeur: IEEE
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» A Handheld High-Sensitivity Micro-NMR CMOS Platform With B-Field Stabilization for Multi-Type Biological/Chemical Assays
Résumé:
We report a micro-nuclear magnetic resonance (NMR) system compatible with multi-type biological/chemical lab-on-a-chip assays. Unified in a handheld scale (dimension: $14 times 6 times 11$ cm $^{3}$ , weight: 1.4 kg), the system is capable to detect <100 pM of Enterococcus faecalis derived DNA from a $2.5~mu text {L}$ sample. The key components are a portable magnet (0.46 T, 1.25 kg) for nucleus magnetization, a system PCB for I/O interface, an FPGA for system control, a current driver for trimming the magnetic (B) field, and a silicon chip fabricated in $0.18~mu text {m}$ CMOS. The latter, integrated with a current-mode vertical Hall sensor and a low-noise readout circuit, facilitates closed-loop B-field stabilization (2 mT $to $ 0.15 mT), which otherwise fluctuates with temperature or sample displacement. Together with a dynamic-B-field transceiver with a planar coil for micro-NMR assay and thermal control, the system demonstrates: 1) selective biological target pinpointing; 2) protein state analysis; and 3) solvent-polymer dynamics, suitable for healthcare, food and colloidal applications, respectively. Compared to a commercial NMR-assay product (Bruker mq-20), this platform greatly reduces the sample consumption ( $120times $ ), hardware volume ( $175times $ ), and weight ( $96times $ ).
Auteurs: Ka-Meng Lei;Hadi Heidari;Pui-In Mak;Man-Kay Law;Franco Maloberti;Rui P. Martins;
Apparue dans: IEEE Journal of Solid-State Circuits
Date publication: 01.-2017, volume: 52, issue:1, pages: 284 - 297
Editeur: IEEE
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» A High Efficiency and Low Distortion 6 W GaN MMIC Doherty Amplifier for 7 GHz Radio Links
Résumé:
This contribution presents a novel design methodology for Gallium Nitride (GaN) Monolithic Microwave Integrated Circuit (MMIC) Doherty Power Amplifiers (DPAs). The proposed solution allows to mitigate the relevant phase distortion (AM/PM) and gain penalty, typically registered in GaN DPAs, without worsening other key features such as back-off efficiency and amplitude distortion (AM/AM). To this purpose, a non-linear driver stage is introduced in both Carrier and Peaking branches, with the aim to provide a chip-level phase distortion compensation mechanism. The idea is to almost zeroing the overall phase distortion by achieving, in the driver stage, an opposite AM/PM behaviour with respect to the one of the final stage. The theoretical formulation is verified presenting the design and experimental characterization of a GaN MMIC DPA for 7 GHz radio links. The chip has been developed in a commercial $0.25mu text {m}$ GaN power process, resulting in a $3times 3$ mm2 chip area. The realized DPA shows 38 dBm of saturated output power, 16 dB of gain, and less than 3° of phase distortion, with a power added efficiency higher than 41% in 6 dB of output power back off.
Auteurs: Rocco Giofré;Paolo Colantonio;
Apparue dans: IEEE Microwave and Wireless Components Letters
Date publication: 01.-2017, volume: 27, issue:1, pages: 70 - 72
Editeur: IEEE
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» A High-speed In Situ Measuring Method for Inner Dimension Inspection
Résumé:
Inner dimensional measurement techniques are difficult to improve because of the tight working space and complex inside measuring environment. In this paper, a high-speed, in situ measuring method is proposed for inner dimension by using revolved double laser beams. First, two laser beams with the inclined angle of 180° are used to construct the measuring line. The relative position between two laser beams is then calibrated before measurement. Second, the two laser beams are revolved consecutively to get collections of data samples during the measurement. The data samples contain the information concerning the geometrical features of measured workpiece. Finally, by fitting the measured data, inner dimensions can be extracted from the statistical characteristic of measured workpiece. The proposed approach is validated by using a developed measuring head installed on the spindle of a numerical control machine. Inner diameter and planar spacing measurements are taken as examples to showcase the efficacy and efficiency of the method proposed.
Auteurs: Xingqiang Li;Zhong Wang;Luhua Fu;
Apparue dans: IEEE Transactions on Instrumentation and Measurement
Date publication: 01.-2017, volume: 66, issue:1, pages: 104 - 112
Editeur: IEEE
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» A Highly Efficient Power Amplifier at 5.8 GHz Using Independent Harmonic Control
Résumé:
An optimal design of a highly efficient power amplifier (PA) is described using independent fundamental and second harmonic impedance control technique. In fabrication of a power amplifier, a tuning method is indispensable because the simulation models of the device and capacitor have some difference with the actual value. To achieve a high drain efficiency, the fundamental and harmonic impedances need to be accurately optimized. However, as the operating frequency is increased, the matching circuit becomes sensitive and it is difficult to realize the accurate optimum matching. To solve the problem, the matching circuit of the PA adopts the independent harmonic control circuit using the characteristic of a quarter-wavelength microstrip line. A power amplifier with the concept is designed and implemented using a Cree GaN HEMT CGH40035 at 5.8 GHz. The peak output power, drain efficiency and gain are 47.2 dBm, 70.2%, and 10.2 dB.
Auteurs: Yunsik Park;Donggyu Minn;Seokhyeon Kim;Junghwan Moon;Bumman Kim;
Apparue dans: IEEE Microwave and Wireless Components Letters
Date publication: 01.-2017, volume: 27, issue:1, pages: 76 - 78
Editeur: IEEE
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» A Hybrid Logic Block Architecture in FPGA for Holistic Efficiency
Résumé:
This brief presents a hybrid design of a configurable logic block (CLB) composed of look-up tables (LUTs) and universal logic gates (ULGs). A ULG is designed to realize holistic efficiency compared with the corresponding LUT. Previous designs with ULGs are either based on pure ULG or LUT-ULG complementary architecture, which incur a longer delay or double the area compared to the LUT-based design. In contrast, we propose a hybrid CLB that contains a mixture of LUTs and ULGs to address the generality problem as well as to achieve the holistic benefits including the area, performance, and power. To exploit the advantage of ULGs thoroughly while not causing negative side effects, the ratio of LUTs and ULGs in one CLB is explored by experiments. Experimental results show that, compared to pure LUT design, our proposed architecture design can save up to 17.1% logic power as well as 11.2% delay improvement and 10.4% logic area reduction. Compared to the state-of-the-art design, our proposed design has 3.8% improvement in power delay product and 17.1% improvement in area cost.
Auteurs: Tao Luo;Hao Liang;Wei Zhang;Bingsheng He;Douglas Maskell;
Apparue dans: IEEE Transactions on Circuits and Systems II: Express Briefs
Date publication: 01.-2017, volume: 64, issue:1, pages: 71 - 75
Editeur: IEEE
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» A Hybrid Time Borrowing Technique to Improve the Performance of Digital Circuits in the Presence of Variations
Résumé:
Dynamic flip-flop conversion (DFFC) is a time borrowing method for improving the performance of digital circuits. Existing types of DFFC [11], [12] suffer from successive critical and critical feedback paths that are frequently seen in digital circuits. Moreover, they are unable to increase the performance of the designs with short sequential depth. In this paper, we introduce a hybrid technique which utilizes DFFC together with a dynamic clock stretching mechanism. Our technique is able to mitigate the problems of successive critical and critical feedback path structures even in the presence of process variations. The results show that our hybrid technique is able to increase the performance of some ITC'99 and ISCAS'89 benchmarks by 24.4% on average while DFFC Type C increases the performance only by 8.4% on average. Furthermore, we have shown that our hybrid technique is able to tolerate process variations, 18% power supply variation, and 100 °C temperature variations, 27.3%, 16.4%, and 13.3% better than the state-of-the-art methods on average, respectively.
Auteurs: Mehrnaz Ahmadi;Bijan Alizadeh;Behjat Forouzandeh;
Apparue dans: IEEE Transactions on Circuits and Systems I: Regular Papers
Date publication: 01.-2017, volume: 64, issue:1, pages: 100 - 110
Editeur: IEEE
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» A Laplacian-Based Approach for Finding Near Globally Optimal Solutions to OPF Problems
Résumé:
A semidefinite programming (SDP) relaxation globally solves many optimal power flow (OPF) problems. For other OPF problems where the SDP relaxation only provides a lower bound on the objective value rather than the globally optimal decision variables, recent literature has proposed a penalization approach to find feasible points that are often nearly globally optimal. A disadvantage of this penalization approach is the need to specify penalty parameters. This paper presents an alternative approach that algorithmically determines a penalization appropriate for many OPF problems. The proposed approach constrains the generation cost to be close to the lower bound from the SDP relaxation. The objective function is specified using iteratively determined weights for a Laplacian matrix. This approach yields feasible points to the OPF problem that are guaranteed to have objective values near the global optimum due to the constraint on generation cost. The proposed approach is demonstrated on both small OPF problems and a variety of large test cases representing portions of European power systems.
Auteurs: Daniel K. Molzahn;Cédric Josz;Ian A. Hiskens;Patrick Panciatici;
Apparue dans: IEEE Transactions on Power Systems
Date publication: 01.-2017, volume: 32, issue:1, pages: 305 - 315
Editeur: IEEE
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» A Liquid Level Sensor Based on a Race-Track Helical Plastic Optical Fiber
Résumé:
A multi-point liquid level sensor was proposed in this letter, which is based on a plastic optical fiber with a race-track helical structure. The principle of liquid sensing is based on higher modes leak out and regenerate repeatedly in the bend and straight sections, respectively. Therefore, propagation loss was introduced in the bend sections of the fiber submerged under the liquid. The liquid level shift can be detected by observing alterations in the propagation loss changes. The sensor features compactness and independence from the refractive index of the liquid. The level measurement resolution is flexible and expected to reach the same order of magnitude as the diameter.
Auteurs: Ning Jing;Chuanxin Teng;Jie Zheng;Guanjun Wang;Yuanyuan Chen;Zhibin Wang;
Apparue dans: IEEE Photonics Technology Letters
Date publication: 01.-2017, volume: 29, issue:1, pages: 158 - 160
Editeur: IEEE
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» A Look at What's New: Reviewing the Second Edition of API 547
Résumé:
This article will review many of the changes in the second edition of the American Petroleum Institute (API) 547 specification, General-Purpose Form-Wound Squirrel Cage Induction Motors-185 kW (250 hp) Through 2,240 kW (3,000 hp) [1]. The first edition of this standard [2] was released in 2005 to provide a set of requirements for general-purpose motors based on the key criteria of API Standard 541, fourth edition, applicable to 375-kW (500-hp) and larger motors [3]. The scope of API 547 is limited to a range of motor sizes and configurations that fit a majority of general-purpose severe duty applications that are common in petrochemical applications. API 541 has recently been updated to its fifth edition [4], and the second edition of API 547 has followed suit with revisions to the scope and criteria, various clarifications, data sheet changes, and an expanded data sheet guide.
Auteurs: Tim Rahill;Barry Wood;Mark Chisholm;Joel Ocmand;
Apparue dans: IEEE Industry Applications Magazine
Date publication: 01.-2017, volume: 23, issue:1, pages: 70 - 80
Editeur: IEEE
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» A Low Complexity Sensing Algorithm for Wideband Sparse Spectra
Résumé:
Compressed sensing-based wideband spectrum sensing approaches have gotten much attention owning to their advantage of relieving the pressure on high signal acquisition costs. Most of these approaches need to recover the signal or power spectrum, which require high computational complexity. This letter proposes a novel wideband sensing algorithm with no recovery (NoR) of spectral, where the location of occupied subband is identified via a maximum inner product method, thus reducing computational complexity significantly. Compared with the existing spectral recovery algorithms, NoR algorithm maintains an excellent sensing performance with several orders of magnitude lower computational complexity.
Auteurs: Shiyu Ren;Zhimin Zeng;Caili Guo;Xuekang Sun;
Apparue dans: IEEE Communications Letters
Date publication: 01.-2017, volume: 21, issue:1, pages: 92 - 95
Editeur: IEEE
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» A Low Complexity Sub-Optimal Approach to Dynamic Spectrum Allocation for White Space Devices With Heterogeneous Bandwidth Requirements
Résumé:
This letter considers the decision-making method of dynamic spectrum allocation by a spectrum manager in a centralized white space cognitive radio communication network with various available frequency fragments and heterogeneous bandwidth requests. To achieve low complexity practical solution to this problem, we propose a hybrid sub-optimal dynamic programming-based algorithm. The performance of the proposed solution is compared with the optimal one and other alternative solutions. The numeric results show that the proposed solution achieves spectrum efficiency close to the optimal one and the complexity is considerably reduced to ${O((n+lambda -1)!/(n!(lambda -1)!))}$ as compared with that of the optimal solution ${Oleft({prod _{i=1}^{n}B_{0}^{(i)}}right)}$ .
Auteurs: Zhong Huang;Yugang Ma;Yueyue Li;Guangjun Wen;
Apparue dans: IEEE Communications Letters
Date publication: 01.-2017, volume: 21, issue:1, pages: 188 - 191
Editeur: IEEE
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» A Low Power Inductorless Wideband LNA With Gm Enhancement and Noise Cancellation
Résumé:
This letter presents the design of an inductorless low power differential low-noise amplifier (LNA) in 65 nm Low Power (LP) CMOS technology for multi-standard radio applications between 100MHz and 4.3 GHz. Based on the combination of common-gate (CG) and common-source (CS) with shunt feedback (SFB) topologies, the LNA utilizes a cross-coupled push-pull structure to realize ${text{g}_text{m}}$ boosting and partial noise cancelling under low power consumption. A cascode transistor is used to alleviate the Miller effect and also constructs a current steering structure to increase the bandwidth and gain. These techniques result in a good overall performance tradeoff after sizing and biasing optimization under the power constraint. A prototype has been implemented and it exhibits a voltage gain of 21.2 dB, an NF of 2.8-4 dB over the frequency range of 100 MHz to 4.3 GHz. It consumes 2 mW from 1.2 V supply and occupies an active area of 0.05 mm2.
Auteurs: Zhijian Pan;Chuan Qin;Zuochang Ye;Yan Wang;
Apparue dans: IEEE Microwave and Wireless Components Letters
Date publication: 01.-2017, volume: 27, issue:1, pages: 58 - 60
Editeur: IEEE
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» A Low Profile Dual-Polarized Wideband Omnidirectional Antenna Based on AMC Reflector
Résumé:
A low-profile dual-polarized wideband omnidirectional antenna with artificial magnetic conductor (AMC) reflector is proposed. The proposed antenna is operated in the long term evolution band (1.7–2.7 GHz), and has a compact size of 200 mm \times200 mm \times 30.6 mm (about 0.25\lambda height at 2.7 GHz). The antenna structure consists of a horizontally polarized circular loop antenna, a vertically polarized low-profile monopole antenna, and an AMC reflector. By carefully designing the reflection characteristics of the AMC reflector, the profile height of the proposed antenna is significantly reduced as compared with those of antennas backed by conventional perfect electric conductor (PEC) ground planes. Simulated and measured results show that the proposed antenna is able to achieve over 45% impedance bandwidth (VSWR <1.8) with stable radiation patterns in the band of 1.7–2.7 GHz. Owing to the attractive wide bandwidth, low-profile configuration, and ease of fabrication, the proposed antenna is suitable for microbase station systems, especially for indoor ceiling antenna networking applications.
Auteurs: Jianlin Wu;Shiwen Yang;Yikai Chen;Shiwei Qu;Zaiping Nie;
Apparue dans: IEEE Transactions on Antennas and Propagation
Date publication: 01.-2017, volume: 65, issue:1, pages: 368 - 374
Editeur: IEEE
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» A Low-Storage Discontinuous Galerkin Time-Domain Method
Résumé:
In this letter, a discontinuous Galerkin time-domain (DGTD) method with a low memory scheme for the solution of Maxwell’s equations has been proposed. By expressing curl vector basis functions in terms of barycentric coordinates, the matrices in the DGTD method including mass and flux matrices can be rewritten into the summation of a few universal matrices. With the use of the proposed scheme, the computer memory storage requirement of the DGTD method is greatly reduced with the increases of the order of spatial basis functions and the number of meshing elements, albeit a slightly increase of computational time. Numerical results including the slotted waveguide and Vivaldi antenna array are given to illustrate good computational performance.
Auteurs: Cheng-Yi Tian;Yan Shi;Chang-Hong Liang;
Apparue dans: IEEE Microwave and Wireless Components Letters
Date publication: 01.-2017, volume: 27, issue:1, pages: 1 - 3
Editeur: IEEE
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» A Meander Line UHF RFID Reader Antenna for Near-field Applications
Résumé:
A novel ultrahigh frequency radio frequency identification reader antenna based on electromagnetic coupling between two open-ended microstrip (MS) meander lines for near-field applications is investigated in this paper. The corresponding currents flowing along the two MS meander lines are reversed in phase with approximately identical amplitudes. Meander-line units are introduced to achieve a uniform distribution of strong magnetic and electric fields. The performance of an antenna prototype comprised of six pairs of meander lines is analyzed. The proposed antenna simultaneously exhibits a uniform magnetic field distribution with a reading region of 480 mm \times200 mm \times20 mm and a uniform linear electric field distribution with a reading region of 480 mm \times420 mm \times300 mm. The proposed antenna exhibits a low far-field gain, and has a bandwidth from 914 to 929 MHz. Both simulated and measured results have shown a good performance of the antenna.
Auteurs: Yuan Yao;Caixia Cui;Junsheng Yu;Xiaodong Chen;
Apparue dans: IEEE Transactions on Antennas and Propagation
Date publication: 01.-2017, volume: 65, issue:1, pages: 82 - 91
Editeur: IEEE
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» A MEMS-Assisted Temperature Sensor With 20- $mu text{K}$ Resolution, Conversion Rate of 200 S/s, and FOM of 0.04 pJK2
Résumé:
This paper presents a dual-microelectromechanical system (MEMS) resonator-based temperature sensor. In this sensor, the readout circuit estimates the temperature by measuring the frequency ratio of the two clocks generated by separate resonators with different temperature coefficients. The circuit is realized in a 0.18- $mu text{m}$ CMOS process and achieves a resolution of 20 $mu text{K}$ over a bandwidth of 100 Hz while consuming 19 mW of power, leading to a resolution FOM of 0.04 pJK2. It enables us to implement a MEMS-based programmable oscillator with an Allan deviation of <1 $e^{-10}$ over 1 s averaging time, and a frequency stability of <±0.1 parts per million in the temperature range from −45 °C to 105 °C. Such oscillators are key building blocks in telecom, datacom, and precision timekeeping applications.
Auteurs: Meisam Heidarpour Roshan;Samira Zaliasl;Kimo Joo;Kamran Souri;Rajkumar Palwai;Lijun Will Chen;Amanpreet Singh;Sudhakar Pamarti;Nicholas J. Miller;Joseph C. Doll;Carl Arft;Sassan Tabatabaei;Carl Sechen;Aaron Partridge;Vinod Menon;
Apparue dans: IEEE Journal of Solid-State Circuits
Date publication: 01.-2017, volume: 52, issue:1, pages: 185 - 197
Editeur: IEEE
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» A Method for Optimizing the Base Position of Mobile Painting Manipulators
Résumé:
This paper presents an algorithm to optimize the base position of a mobile manipulator to meet the requirements of local painting tasks. Considering the physical limits and singularity of the manipulator, the feasible base positions are first discretely calculated with the given poses of the end effector by inverse kinematics. Then, the joint-level performance criteria are proposed with respect to the requirements of the painting process. The weight coefficients are also determined by the critic method to balance the contribution of every criterion. Thus, the globally near-optimal base position is selected by sorting all feasible positions according to the evaluation criteria. The experimental results show that the planning result is well executed and has an acceptable computation time, thus demonstrating that the algorithm is both practical and effective compared with previous methods.
Auteurs: Shunan Ren;Ying Xie;Xiangdong Yang;Jing Xu;Guolei Wang;Ken Chen;
Apparue dans: IEEE Transactions on Automation Science and Engineering
Date publication: 01.-2017, volume: 14, issue:1, pages: 370 - 375
Editeur: IEEE
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» A Method of Observing Acoustic Scattering and Absorption By Fish Schools Using Autonomous Underwater Vehicles
Résumé:
A method for observing acoustic scattering due to reflection/refraction by a fish aggregation and absorption caused by sound propagation through a fish aggregation using autonomous underwater vehicles (AUVs) is presented in this paper, and the merits and challenges of the method are discussed. Results from an experiment conducted off Cape Hatteras, NC, USA, in May 2012 are used to illustrate this experimental technique. Results from the oceanographic and acoustic data collected are presented along with discussions on directions for future research and how to further improve this technique.
Auteurs: Arthur E. Newhall;Ying-Tsong Lin;Thomas M. Grothues;James F. Lynch;Glen G. Gawarkiewicz;
Apparue dans: IEEE Journal of Oceanic Engineering
Date publication: 01.-2017, volume: 42, issue:1, pages: 29 - 36
Editeur: IEEE
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» A Miniature Electrical Impedance Tomography Sensor and 3-D Image Reconstruction for Cell Imaging
Résumé:
Real-time quantitative imaging is becoming highly desirable to study nondestructively the biological behavior of 3-D cell culture systems. In this paper, we investigate the feasibility of quantitative imaging/monitoring of 3-D cell culture processes via electrical impedance tomography (EIT), which is capable of generating conductivity images in a non-destructive manner with high temporal resolution. To this end, a planar miniature EIT sensor amenable to standard cell culture format is designed, and a 3-D forward model for the sensor is developed for 3-D imaging. Furthermore, a novel 3-D-Laplacian and sparsity joint regularization algorithm is proposed for enhanced 3-D image reconstruction. Simulation phantoms with spheres at various vertical and horizontal positions were imaged for 3-D performance evaluation. In addition, experiments on human breast cancer cell spheroid and a triangular breast cancer cell pellet were carried out for experimental verification. The results have shown that the stable measurement on high conductive cell culture medium and the significant improvement of image quality based on the proposed regularization method are achieved. It demonstrates the feasibility of using the miniature EIT sensor and 3-D image reconstruction algorithm to visualize 3-D cell cultures, such as spheroids or artificial tissues and organs. The established work would expedite real-time quantitative imaging of 3-D cell culture for assessment of cellular dynamics.
Auteurs: Yunjie Yang;Jiabin Jia;Stewart Smith;Nadira Jamil;Wesam Gamal;Pierre-Olivier Bagnaninchi;
Apparue dans: IEEE Sensors Journal
Date publication: 01.-2017, volume: 17, issue:2, pages: 514 - 523
Editeur: IEEE
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» A Modified Bayesian Filter for Randomly Delayed Measurements
Résumé:
The traditional Bayesian approximation framework for filtering in discrete time systems assumes that the measurement is available at every time instant. But in practice, the measurements could be randomly delayed. In the literature, the problem has been examined and solution is provided by restricting the maximum number of delay to one or two time steps. This technical note develops an approach to deal with the filtering problems with an arbitrary number of delays in measurement. Pursuing this objective, traditional Bayesian approximation to nonlinear filtering problem is modified by reformulating the expressions of mean and covariances which appear during the measurement update. We use the cubature quadrature rule to evaluate the multivariate integral expressions for the mean vector and the covariance matrix which appear in the developed filtering algorithm. We compare the new algorithm which accounts for delay with the existing CQKF heuristics on two different examples and demonstrate how accounting for a random delay improves the filtering performance.
Auteurs: Abhinoy Kumar Singh;Paresh Date;Shovan Bhaumik;
Apparue dans: IEEE Transactions on Automatic Control
Date publication: 01.-2017, volume: 62, issue:1, pages: 419 - 424
Editeur: IEEE
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» A Monolithically BST-Integrated $K_{a}$ -Band Beamsteerable Reflectarray Antenna
Résumé:
A 5\times 9 beamsteering reflectarray operating at K_{a} -band is presented in this paper. Continuous beamsteering is achieved through the use of barium strontium titanate (BST) technology. BST is monolithically integrated into each unit cell using clean room fabrication techniques. With the application of dc bias voltage, an integrated tunable capacitor is realized. The unit cell design utilized in this reflectarray is analyzed and multiple biasing schemes are assessed. The reflectarray is designed to scan in the E -plane only, and is evaluated using full-wave simulations and measurements. An appropriate feeding structure is designed and fabricated using a fused filament deposition 3-D printer, with micrometer stages used to make fine adjustments for final alignment. Overall a gain of 8.3 dBi, with a 1-dB bandwidth of 2% and continuous beamscanning from 0° to 25° at 32 GHz is demonstrated.
Auteurs: Kalyan K. Karnati;Michael E. Trampler;Xun Gong;
Apparue dans: IEEE Transactions on Antennas and Propagation
Date publication: 01.-2017, volume: 65, issue:1, pages: 159 - 166
Editeur: IEEE
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» A Multi-Leader Multi-Follower Stackelberg Game for Resource Management in LTE Unlicensed
Résumé:
It is known that the capacity of the cellular network can be significantly improved when cellular operators are allowed to access the unlicensed spectrum. Nevertheless, when multiple operators serve their user equipments (UEs) in the same unlicensed spectrum, the inter-operator interference management becomes a challenging task. In this paper, we develop a multi-operator multi-UE Stackelberg game to analyze the interaction between multiple operators and the UEs subscribed to the services of the operators in unlicensed spectrum. In this game, to avoid intolerable interference to the Wi-Fi access point (WAP), each operator sets an interference penalty price for each UE that causes interference to the WAP, and the UEs can choose their sub-bands and determine the optimal transmit power in the chosen sub-bands of the unlicensed spectrum. Accordingly, the operators can predict the possible actions of the UEs and hence set the optimal prices to maximize its revenue earned from UEs. Furthermore, we consider two possible scenarios for the interaction of operators in the unlicensed spectrum. In the first scenario, referred to as the non-cooperative scenario, the operators cannot coordinate with each other in the unlicensed spectrum. A sub-gradient approach is applied for each operator to decide its best-response action based on the possible behaviors of others. In the second scenario, referred to as the cooperative scenario, all operators can coordinate with each other to serve UEs and control the UEs’ interference in the unlicensed spectrum. Simulation results have been presented to verify the performance improvement that can be achieved by our proposed schemes.
Auteurs: Huaqing Zhang;Yong Xiao;Lin X. Cai;Dusit Niyato;Lingyang Song;Zhu Han;
Apparue dans: IEEE Transactions on Wireless Communications
Date publication: 01.-2017, volume: 16, issue:1, pages: 348 - 361
Editeur: IEEE
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» A Multisensor Navigation System Based on an Adaptive Fault-Tolerant GOF Algorithm
Résumé:
This paper describes an adaptive fault-tolerant multisensor integrated navigation system. The proposed system uses a decentralized filtering architecture to fuse inertial navigation system (INS), GNSS, and $Locata$ sensor subsystems. In order to improve system accuracy, the global optimal filtering (GOF) algorithm is implemented. The GNSS and $Locata$ subsystems are separately integrated with the INS to obtain the local prediction and local estimation based on the GNSS/INS and $Locata$/ INS combinations. The GOF algorithm is then applied to fuse the local and global information to generate the optimal state estimation of the GNSS/Locata/INS navigation system. The adaptive fault-tolerant algorithm is based on the innovation covariance discrepancy, which mainly adapts to the changes in sensor measurement statistical properties and mitigates the adverse influence caused by these changes. It is found that the GOF algorithm does improve the accuracy of the navigation solution compared with conventional filtering. To evaluate the fault-tolerant ability of the proposed system, a series of GNSS failures is simulated. The results show that the proposed system can mitigate the effect of the failures, which verify the higher reliability and fault-tolerant capability of the proposed system.
Auteurs: Wei Jiang;Yong Li;Chris Rizos;
Apparue dans: IEEE Transactions on Intelligent Transportation Systems
Date publication: 01.-2017, volume: 18, issue:1, pages: 103 - 113
Editeur: IEEE
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» A Multitude of RFID Tags: A Broadband Design for Stackable Applications
Résumé:
RFID technology has been a part of our lives for a number years. However, research and development are ongoing to produce novel, improved tags for higher ranges working at lower power as well as to differentiate between tags in logistic applications for conventional chip-based RFIDs. Because of such improvements in already existing infrastructures and close-proximity scenarios, the second ultrahigh-frequency (UHF) RFID student design competition was held in May in San Francisco during the 2016 IEEE Microwave Theory and Techniques Society (MTT-S) International Microwave Symposium (IMS2016).
Auteurs: Patrick Soboll;Volker Wienstroer;Rainer Kronberger;
Apparue dans: IEEE Microwave Magazine
Date publication: 01.-2017, volume: 18, issue:1, pages: 107 - 111
Editeur: IEEE
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» A Networking Revolution Powered by Signal Processing [Special Reports]
Résumé:
Auteurs: John Edwards;
Apparue dans: IEEE Signal Processing Magazine
Date publication: 01.-2017, volume: 34, issue:1, pages: 9 - 12
Editeur: IEEE
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» A New Conservative High-Order Modified FDTD(2,4) Scheme
Résumé:
In this paper, we propose a new 3-D conservative FDTD(2, 4) scheme exhibiting properties close to the 2-D-M24 scheme. This scheme is designed to retain a 2-D stencil in the field update equations and has high-phase accuracy at low-grid resolutions. Moreover, an accurate Courant–Friedrichs–Lewy condition has been validated for this scheme. Some experiments are conducted to assess the higher accuracy of the proposed scheme.
Auteurs: Nicolas Bui;Christophe Guiffaut;Alain Reineix;Philippe Pouliguen;
Apparue dans: IEEE Transactions on Antennas and Propagation
Date publication: 01.-2017, volume: 65, issue:1, pages: 269 - 277
Editeur: IEEE
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» A New Feature Selection Technique for Load and Price Forecast of Electrical Power Systems
Résumé:
Load and price forecasts are necessary for optimal operation planning in competitive electricity markets. However, most of the load and price forecast methods suffer from lack of an efficient feature selection technique with the ability of modeling the nonlinearities and interacting features of the forecast processes. In this paper, a new feature selection method is presented. An important contribution of the proposed method is modeling interaction in addition to relevancy and redundancy, based on information-theoretic criteria, for feature selection. Another main contribution of the paper is proposing a hybrid filter-wrapper approach. The filter part selects a minimum subset of the most informative features by considering relevancy, redundancy, and interaction of the candidate inputs in a coordinated manner. The wrapper part fine-tunes the settings of the composite filter.
Auteurs: Oveis Abedinia;Nima Amjady;Hamidreza Zareipour;
Apparue dans: IEEE Transactions on Power Systems
Date publication: 01.-2017, volume: 32, issue:1, pages: 62 - 74
Editeur: IEEE
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» A New Modeling Approach for Permanent Magnet Vernier Machine With Modulation Effect Consideration
Résumé:
A dynamic nonlinear equivalent magnetic network (NEMN) method for a fault-tolerant permanent magnet Vernier machine is proposed in this paper. The key of this paper is to develop two models for no-load and on-load conditions, respectively, because the flux distribution under the no-load condition is different from that under the on-load condition owing to the modulation effect. The no-load model is built based on the precise air-gap modeling method, while the on-load model is developed based on the simplified air-gap modeling method. Meanwhile, a new circuit transformation method is provided for the on-load model to solve the difficulty of low convergence speed in the iteration process. Moreover, iron saturation and fringing effect are considered in the proposed NEMN models. Then, it is used to predict the air-gap flux density, cogging torque, back-electromotive force, and inductance. Finally, both the finite-element method and experimental tests are used to confirm the accuracy and effectiveness of the proposed models.
Auteurs: Guohai Liu;Shan Jiang;Wenxiang Zhao;Qian Chen;
Apparue dans: IEEE Transactions on Magnetics
Date publication: 01.-2017, volume: 53, issue:1, pages: 1 - 12
Editeur: IEEE
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» A New Optical Voltage Sensor Based on Radial Polarization Detection
Résumé:
A new optical voltage sensor based on radial polarization detection is proposed in this paper, and then the linear and direct measurement of an electro-optic (EO) phase delay can be realized. The sensor mainly consists of an EO crystal, a quarter-wave plate, a newly designed radially polarized grating, and an image collecting system. The quarter-wave plate is employed to convert the EO phase delay to a rotation of the polarization plane of a linearly polarized light, and then the grating is to convert it into the rotation of a ring facular, so the EO phase delay can be measured directly by positioning the dark stripe center in the facular. The principle of the sensor is analyzed by Jones matrix. The experimental results show that this new sensor can achieve a good linear measurement of the EO phase delay in the range of 360° with the measurement error less than 0.5%, and has no limits of the half-wave voltage of crystal.
Auteurs: Qiao Tan;Qifeng Xu;Nan Xie;Chao Li;
Apparue dans: IEEE Transactions on Instrumentation and Measurement
Date publication: 01.-2017, volume: 66, issue:1, pages: 158 - 164
Editeur: IEEE
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» A New Run-to-Run Approach for Reducing Contact Bounce in Electromagnetic Switches
Résumé:
Contact bounce is probably the most undesirable phenomenon of electromagnetic switches. It reduces the performance of relays and contactors and is directly related to some of the processes that result in the destruction of the device. In this paper, a complete formulation of the problem is provided and a new strategy inspired by run-to-run control is presented for reducing contact bounce. The method, which makes use of the repetitive functioning of these systems, is highly versatile and may be applied to different switches under diverse operating conditions. In addition, it is able to deal with changes during the service life of the device, such as plastic deformations or the erosion of the contacts. Several experimental results are included to prove the effectiveness of the method.
Auteurs: Edgar Ramirez-Laboreo;Carlos Sagues;Sergio Llorente;
Apparue dans: IEEE Transactions on Industrial Electronics
Date publication: 01.-2017, volume: 64, issue:1, pages: 535 - 543
Editeur: IEEE
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» A New Short-Channel-Effect-Degraded Subthreshold Behavior Model for Double-Fin Multichannel FETs (DFMcFETs)
Résumé:
On the basis of the quasi-three-dimensional scaling equation and minimum bottom-central potential, a new short-channel-effect-degraded subthreshold behavior model for double-Fin multichannel FET (DFMcFET) is presented. It is shown that the deep trench of the DFMcFET is superior to the shallow one in respect of suppressing short-channel effects (SCEs) and reducing the threshold voltage roll-off and subthreshold roll-up. Meanwhile, the wide trench and thin gate oxide are required to resist SCEs and reduce the subthreshold behavior degradation as the channel length is further decreased. In comparison to the counterpart of conventional FinFET, DFMcFET not only provides the more conducting channel, but also enhances the immunity to SCEs due to its shorter scaling length. Besides, both threshold voltage roll-off ΔVTH and subthreshold swing roll-up ΔSS can be well controlled by the scaling theory. The allowable minimum channel length can be uniquely determined according to the criterion of the scaling factor. With its computational efficiency and simple form, the model can be easily used for the circuit application of the DFMcFET.
Auteurs: Te-Kuang Chiang;
Apparue dans: IEEE Transactions on Nanotechnology
Date publication: 01.-2017, volume: 16, issue:1, pages: 16 - 22
Editeur: IEEE
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» A New Sparse Subspace Clustering Algorithm for Hyperspectral Remote Sensing Imagery
Résumé:
Robust techniques such as sparse subspace clustering (SSC) have been recently developed for hyperspectral images (HSIs) based on the assumption that pixels belonging to the same land-cover class approximately lie in the same subspace. In order to account for the spatial information contained in HSIs, SSC models incorporating spatial information have become very popular. However, such models are often based on a local averaging constraint, which does not allow for a detailed exploration of the spatial information, thus limiting their discriminative capability and preventing the spatial homogeneity of the clustering results. To address these relevant issues, in this letter, we develop a new and effective $ell _{2} $ -norm regularized SSC algorithm which adds a four-neighborhood $ell _{2} $ -norm regularizer into the classical SSC model, thus taking full advantage of the spatial-spectral information contained in HSIs. The experimental results confirm the potential of including the spatial information (through the newly added $ell _{2} $ -norm regularization term) in the SSC framework, which leads to a significant improvement in the clustering accuracy of SSC when applied to HSIs.
Auteurs: Han Zhai;Hongyan Zhang;Liangpei Zhang;Pingxiang Li;Antonio Plaza;
Apparue dans: IEEE Geoscience and Remote Sensing Letters
Date publication: 01.-2017, volume: 14, issue:1, pages: 43 - 47
Editeur: IEEE
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» A New ZVT Snubber Cell for PWM-PFC Boost Converter
Résumé:
In this paper, a new zero-voltage transition (ZVT) snubber cell is developed for pulse width modulated (PWM) and power factor corrected (PFC) boost converters operating in continuous conduction mode. A new family of PFC boost converter implemented with this new ZVT snubber cell is proposed. In this new PFC boost converter, the main switch is turned-on perfectly with ZVT and turned-off under zero-voltage switching (ZVS). Besides, the auxiliary switch is turned-on under zero current switching and turned-off under ZVS. The main and all auxiliary diodes are operating under soft switching. During ZVT operation, the switching energies on the snubber inductance are transferred to the output by a transformer, and so the current stresses of the inductance and the auxiliary switch are significantly decreased. Also, this transformer ensures the usage of sufficient capacitors for ZVS turning off of the main and auxiliary switches. The main switch and main diode are not subjected to any additional voltage and current stresses. In this study, a detailed steady-state analysis of the proposed new ZVT-PWM-PFC boost converter is presented and this theoretical analysis is verified by a prototype with 100 kHz and 2 kW.
Auteurs: Hacı Bodur;Suat Yıldırmaz;
Apparue dans: IEEE Transactions on Industrial Electronics
Date publication: 01.-2017, volume: 64, issue:1, pages: 300 - 309
Editeur: IEEE
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» A Nonhuman Primate Brain–Computer Typing Interface
Résumé:
Brain–computer interfaces (BCIs) record brain activity and translate the information into useful control signals. They can be used to restore function to people with paralysis by controlling end effectors such as computer cursors and robotic limbs. Communication neural prostheses are BCIs that control user interfaces on computers or mobile devices. Here we demonstrate a communication prosthesis by simulating a typing task with two rhesus macaques implanted with electrode arrays. The monkeys used two of the highest known performing BCI decoders to type out words and sentences when prompted one symbol/letter at a time. On average, monkeys J and L achieved typing rates of 10.0 and 7.2 words per minute (wpm), respectively, copying text from a newspaper article using a velocity-only 2-D BCI decoder with dwell-based symbol selection. With a BCI decoder that also featured a discrete click for key selection, typing rates increased to 12.0 and 7.8 wpm. These represent the highest known achieved communication rates using a BCI. We then quantified the relationship between bitrate and typing rate and found it approximately linear: typing rate in wpm is nearly three times bitrate in bits per second. We also compared the metrics of achieved bitrate and information transfer rate and discuss their applicability to real-world typing scenarios. Although this study cannot model the impact of cognitive load of word and sentence planning, the findings here demonstrate the feasibility of BCIs as communication interfaces and represent an upper bound on the expected achieved typing rate for a given BCI throughput.
Auteurs: Paul Nuyujukian;Jonathan C. Kao;Stephen I. Ryu;Krishna V. Shenoy;
Apparue dans: Proceedings of the IEEE
Date publication: 01.-2017, volume: 105, issue:1, pages: 66 - 72
Editeur: IEEE
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» A Nonvolatile Flip-Flop-Enabled Cryptographic Wireless Authentication Tag With Per-Query Key Update and Power-Glitch Attack Countermeasures
Résumé:
Counterfeiting is a major issue plaguing global supply chains. In order to mitigate this problem, a wireless authentication tag is presented that implements a cryptographically secure pseudorandom number generator and authenticated encryption modes. The tag uses Keccak, the cryptographic core of SHA3, to update keys before each protocol invocation, limiting side-channel leakage. Power-glitch attacks are mitigated through state backup on ferroelectric capacitor-based nonvolatile flip-flops with a fully integrated energy backup storage, which needs a 2.2 $times $ smaller area compared with conventional approaches. The 130 nm CMOS tag harvests wireless power through a 433 MHz inductive link and communicates with a reader by a pulse-based modulation that minimizes the wireless power dead time. The proposed regulating voltage multiplier simultaneously rectifies, boosts, and regulates a >0.55 V ac input to a 1.5 V supply voltage with <1.1% line and load regulation while requiring only one on-chip decoupling capacitor. The bidirectional data telemetry operates at 125 kb/s, while requiring 4% (downlink) and 6.25% (uplink) duty cycles. Full system operation including the tag, reader, and server protocol is demonstrated in the presence of worst-case power interruption events.
Auteurs: Hyung-Min Lee;Chiraag S. Juvekar;Joyce Kwong;Anantha P. Chandrakasan;
Apparue dans: IEEE Journal of Solid-State Circuits
Date publication: 01.-2017, volume: 52, issue:1, pages: 272 - 283
Editeur: IEEE
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» A Note on One Weight and Two Weight Projective $mathbb {Z}_{4}$ -Codes
Résumé:
In this paper, we solve the open problems raised in [8] and present some examples to illustrate the obtained results. Moreover, we work out the diophantine problem by Shi and Wang and then give the sufficient conditions for the nonexistence of two-Lee weight projective codes over mathbb {Z}_{4} with type 4^{k_{1}}2^{k_{2}} .
Auteurs: Minjia Shi;Liangliang Xu;Gang Yang;
Apparue dans: IEEE Transactions on Information Theory
Date publication: 01.-2017, volume: 63, issue:1, pages: 177 - 182
Editeur: IEEE
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» A Novel Approach to Accurately Determine the $t_{q}$ Parameter of Thyristors
Résumé:
The continued use of high-voltage thyristor devices in industry and their increased use in high-voltage dc transmission systems call for more attention to the properties of these devices. One of the important thyristor parameters is their turn-off time t_{q} , which can be a limiting factor when applying thyristors at elevated switching frequencies. Hence, the accurate measurement of t_{q} and its variation versus the operating conditions remains a crucial task for thyristor converters operating at elevated switching frequencies. In this paper, a proper test circuit for measuring this parameter with a high level of accuracy has been designed and built. Owing to the test circuit specificity, the variation effects of several electrical and physical constraints, such as the forward current I_{F} , the reverse applied voltage V_{R} , the operating temperature T_{o} , and the ramp rate of the forward reapplied voltage dV_{D}/dt , on the t_{q} parameter of thyristors are also studied and analyzed based on the physics of semiconductor devices and associated simulations.
Auteurs: Hatem Garrab;Atef Jedidi;Hervé Morel;Kamel Besbes;
Apparue dans: IEEE Transactions on Industrial Electronics
Date publication: 01.-2017, volume: 64, issue:1, pages: 206 - 216
Editeur: IEEE
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» A Novel Architecture to Eliminate Bottlenecks in a Parallel Tiled QRD Algorithm for Future MIMO Systems
Résumé:
QR decomposition (QRD) is one of the performance bottlenecks in a lot of high performance wireless communication algorithms and should have the flexibility property for future multiple-input multiple-output systems. However, the existing QRD architectures only focus on several fixed dimension matrices. The parallel tiled QRD algorithm is a perfect choice to implement QRD for its flexibility and modularity property. The size of the tile is set to 2 $times$ 2 instead of the traditional 200 $times$ 200 or more to support flexible antenna configurations in this brief. Using a look-ahead technique and the property of unitary matrix, a novel algorithm based on a modified Gram–Schmidt (MGS) algorithm is proposed for the bottleneck operations (GEQRT and TTQRT) of the parallel tiled QRD algorithm. A corresponding hardware architecture is also designed with the proposed algorithm. The implementation results show that the hardware architecture based on the proposed algorithm achieves a 2.7× reduction in normalized processing latency, compared with the one based on the traditional MGS algorithm.
Auteurs: Cang Liu;Zuocheng Xing;Luechao Yuan;Chuan Tang;Yang Zhang;
Apparue dans: IEEE Transactions on Circuits and Systems II: Express Briefs
Date publication: 01.-2017, volume: 64, issue:1, pages: 26 - 30
Editeur: IEEE
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» A Novel Control Approach for High-Precision Positioning of a Piezoelectric Tube Scanner
Résumé:
An optimal controller for high-precision spiral positioning of a piezoelectric tube scanner used in an atomic force microscope (AFM) is proposed in this paper. In the proposed control scheme, a second-order vibration compensator is incorporated with the piezoelectric tube scanner (PTS) to suppress the vibration of the PTS at the resonant frequency. An internal model of a reference sinusoidal signal is included with the augmented plant model and an integrator is introduced with a linear quadratic Gaussian controller which reduces the phase error between the input and output sinusoids. The proposed method allows a commercial AFM to scan at high scanning speeds as an alternative to the raster scanning approach. The performance of this controller is assessed with closed-loop frequency response, tracking accuracy, and a set of spiral scanned images. The raster scanned images obtained using the standard AFM PI controller is also presented for comparison with the spiral images. Experimental results prove the effectiveness of the proposed method.
Auteurs: H. Habibullah;Hemanshu Roy Pota;Ian R. Petersen;
Apparue dans: IEEE Transactions on Automation Science and Engineering
Date publication: 01.-2017, volume: 14, issue:1, pages: 325 - 336
Editeur: IEEE
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» A Novel Data Hiding Algorithm for High Dynamic Range Images
Résumé:
In this paper, we propose a novel data hiding algorithm for high dynamic range (HDR) images encoded by the OpenEXR file format. The proposed algorithm exploits each of three 10-bit mantissa fields as an embedding unit in order to conceal k bits of a secret message using an optimal base which produces the least pixel variation. An aggressive bit encoding and decomposition scheme is recommended, which offers a high probability to convey (k + 1) bits without increasing the pixel variation caused by message concealment. In addition, we present a bit inversion embedding strategy to further increase the capacities when the probability of appearance of secret bit “1” is greater than 0.5. Furthermore, we introduce an adaptive data hiding approach for concealing more secret messages in pixels with low luminance, exploiting the features of the human visual system to achieve luminance-aware adaptive data hiding. The stego HDR images produced by our algorithm coincide with the HDR image file format, causing no suspicion from malicious eavesdroppers. The generated stego HDR images and their tone-mapped low dynamic range (LDR) images reveal no perceptual differences when subjected to quantitative testing by visual difference predictor. Our algorithm can resist steganalytic attacks from the HDR and LDR RS and SPAM steganalyzers. We present the first data hiding algorithm for OpenEXR HDR images offering a high embedding rate and producing high visual quality of the stego images. Our algorithm outperforms the current state-of-the-art works.
Auteurs: Yun-Te Lin;Chung-Ming Wang;Wei-Sung Chen;Fang-Pang Lin;Woei Lin;
Apparue dans: IEEE Transactions on Multimedia
Date publication: 01.-2017, volume: 19, issue:1, pages: 196 - 211
Editeur: IEEE
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» A Novel Ferrite SMDS Spoke-Type BLDC Motor for PV Bore-Well Submersible Water Pumps
Résumé:
Photovoltaic (PV) powered submersible electric water pumps are becoming popular in remote rural areas, due to the nonavailability of grid connectivity. However, the initial cost of a PV system is high. Permanent magnet (PM) brushless dc (BLDC) motors are efficient compared to existing induction motors, which reduce the cost of PV array. However, steep increase in the cost of rare-earth magnets like NdFeB and SmCo makes the use of PM motor uneconomical for PV systems. Thus, the design of PM motors with ferrite magnets is gaining interest. These magnets have low remanence flux density and are brittle. Thus, flux concentration rotor topologies are desirable. The conventional spoke-type (ST) rotor is one such topology. However, flux leakage is one of its prime concerns. To negotiate this, a novel “semi-modular dual-stack” ST BLDC motor along with its parametric aided three-dimensional finite element method analysis is proposed for a PV-based 100 mm deep bore-well submersible water pump. The motor features minimum flux leakage irrespective of rotor bridge width. In addition, a lumped parameter thermal network is modeled for quick estimation of the winding temperature rise. A prototype motor is fabricated to ascertain the results obtained from simulations, and the experimental results are presented.
Auteurs: S. Sashidhar;B. G. Fernandes;
Apparue dans: IEEE Transactions on Industrial Electronics
Date publication: 01.-2017, volume: 64, issue:1, pages: 104 - 114
Editeur: IEEE
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» A Novel Grading Biomarker for the Prediction of Conversion From Mild Cognitive Impairment to Alzheimer's Disease
Résumé:
Objective: Identifying mild cognitive impairment (MCI) subjects who will progress to Alzheimer's disease (AD) is not only crucial in clinical practice, but also has a significant potential to enrich clinical trials. The purpose of this study is to develop an effective biomarker for an accurate prediction of MCI-to-AD conversion from magnetic resonance images. Methods: We propose a novel grading biomarker for the prediction of MCI-to-AD conversion. First, we comprehensively study the effects of several important factors on the performance in the prediction task including registration accuracy, age correction, feature selection, and the selection of training data. Based on the studies of these factors, a grading biomarker is then calculated for each MCI subject using sparse representation techniques. Finally, the grading biomarker is combined with age and cognitive measures to provide a more accurate prediction of MCI-to-AD conversion. Results: Using the Alzheimer's Disease Neuroimaging Initiative (ADNI) dataset, the proposed global grading biomarker achieved an area under the receiver operating characteristic curve (AUC) in the range of 79–81% for the prediction of MCI-to-AD conversion within three years in tenfold cross validations. The classification AUC further increases to 84–92% when age and cognitive measures are combined with the proposed grading biomarker. Conclusion: The obtained accuracy of the proposed biomarker benefits from the contributions of different factors: a tradeoff registration level to align images to the template space, the removal of the normal aging effect, selection of discriminative voxels, the calculation of the grading biomarker using AD and normal control groups, and the integration of sparse representation technique and the combination of cognitive measur- s. Significance: The evaluation on the ADNI dataset shows the efficacy of the proposed biomarker and demonstrates a significant contribution in accurate prediction of MCI-to-AD conversion.
Auteurs: Tong Tong;Qinquan Gao;Ricardo Guerrero;Christian Ledig;Liang Chen;Daniel Rueckert;Alzheimer's Disease Neuroimaging Initiative;
Apparue dans: IEEE Transactions on Biomedical Engineering
Date publication: 01.-2017, volume: 64, issue:1, pages: 155 - 165
Editeur: IEEE
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» A Novel High-Speed Jet Dispenser Driven by Double Piezoelectric Stacks
Résumé:
A novel bi-piezoelectric jet dispenser with a zoom mechanism is proposed to distribute adhesives rapidly. The work frequency of the new jet dispenser can reach 500 Hz. The volume of the minimum dot is about 25 nL, and the volume error among dots is not more than ±10%. The dot size can be controlled by adjusting the driving voltage of the piezoelectric stack, filling pressure, and the opening time of the valve. Subsystem physical models of the jet valve are presented on the basis of the bi-piezoelectric principle and the zoom mechanism, which involves an electromechanical model, dynamic model, and fluid–solid coupling model. Based on these physical models, a coupled mechanical–electrical fluid simulation model is established, which can be simulated. The simulation results of the multiphysics-coupled model are in accordance with the experiment. The coupling model will develop a reliable simulating platform for high-speed fluid jet. The effectiveness of the bi-piezoelectric method and models is confirmed, and it will provide a new technology for microelectronics packaging.
Auteurs: Can Zhou;Ji-an Duan;Guiling Deng;Junhui Li;
Apparue dans: IEEE Transactions on Industrial Electronics
Date publication: 01.-2017, volume: 64, issue:1, pages: 412 - 419
Editeur: IEEE
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» A Novel Series Power Quality Controller With Reduced Passive Power Filter
Résumé:
A novel variable reactor is presented in this paper. The principle of the novel variable reactor is simply addressed. The equivalent impedance of primary winding of the transformer will vary with the ratio between the primary and the secondary voltages. For the proposed variable reactor, a novel series power quality controller (SPQC) is developed and its principle is analyzed in detail. The SPQC greatly improves the power utility impedance to harmonics instead of the fundamental and plays the role of isolating the harmonics. Because the novel SPQC is with very high impedance to harmonics, the passive power filter can be reduced. Accordingly, three kinds of reduced single-phase passive power filters are presented. The comparison criterion of reducing passive power filter is described. The SPQC is characterized by perfectly isolating the harmonics, simplified passive power filter design, small rating, and being suitable for two kinds of harmonic sources. The validity of the novel SPQC and excellent filtering characteristic are verified by the experimental results.
Auteurs: Dayi Li;Kai Yang;Z. Q. Zhu;Yi Qin;
Apparue dans: IEEE Transactions on Industrial Electronics
Date publication: 01.-2017, volume: 64, issue:1, pages: 773 - 784
Editeur: IEEE
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» A Novel Steering System for a Space-Saving 4WS4WD Electric Vehicle: Design, Modeling, and Road Tests
Résumé:
In this paper, we present a steering system for a space-saving four-wheel steering and four-wheel drive (4WS4WD) electric vehicle (EV) with higher maneuverability and flexibility. The proposed system consists of three main parts, namely, an improved two-front-wheel steering (2FWS) mechanism, an omnidirectional independent steering (OIS) mechanism integrated with steer-by-wire, and a control strategy for the space-saving steering system of an EV. First, the 2FWS mechanism of the proposed 4WS4WD EV is designed to control the front wheels via the redesigned steering system when the vehicle is traveling at high speeds. Second, a retrofitted OIS mechanism is proposed to achieve an angle range of $-!text{35}^{circ}sim+text{90}^{circ}$, which is a solid basis for zero radius turning (ZRT) and lateral parking (LP) motion. The driver can control the OIS to turn the four wheels independently, which is assisted by steer-by-wire technologies. Finally, the control strategy for the space-saving steering system of the EV is redefined for the integrated 2FWS and OIS, which can easily handle the EV for high-speed driving or high-maneuverability turning, such as ZRT and LP motion. This system was field tested on a homemade 4WS4WD EV, and the final system simulation and performance evaluation demonstrated the validity of the proposed steering system for the space-saving 4WS4WD EV.
Auteurs: Zutao Zhang;Xingtian Zhang;Hongye Pan;Waleed Salman;Yagubov Rasim;Xinglong Liu;Chunbai Wang;Yan Yang;Xiaopei Li;
Apparue dans: IEEE Transactions on Intelligent Transportation Systems
Date publication: 01.-2017, volume: 18, issue:1, pages: 114 - 127
Editeur: IEEE
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» A Novel Structure for Single-Switch Nonisolated Transformerless Buck–Boost DC–DC Converter
Résumé:
A novel transformerless buck–boost dc–dc converter is proposed in this paper. The presented converter voltage gain is higher than that of the conventional boost, buck–boost, CUK, SEPIC, and ZETA converters, and high voltage can be obtained with a suitable duty cycle. In this converter, only one power switch is utilized. The voltage stress across the power switch is low. Hence, the low on-state resistance of the power switch can be selected to decrease conduction loss of the switch and improve efficiency. The presented converter has simple structure, therefore, the control of the proposed converter will be easy. The principle of operation and the mathematical analyses of the proposed converter are explained. The validity of the presented converter is verified by the experimental results.
Auteurs: Mohammad Reza Banaei;Hossein Ajdar Faeghi Bonab;
Apparue dans: IEEE Transactions on Industrial Electronics
Date publication: 01.-2017, volume: 64, issue:1, pages: 198 - 205
Editeur: IEEE
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» A Novel Wire-Wrap Slow-Wave Structure for Terahertz Backward Wave Oscillator Applications
Résumé:
An innovative wire-wrap structure was applied as the slow-wave circuit for a backward wave oscillator (BWO) operating in terahertz (THz) band. The construction of the device features a periodic fine copper wire, a rectangular ridged waveguide, and a rectangular cavity in the upper cover plate. Based on the novel structure, the performance of the device presented by dispersion characteristic, coupling impedance, and S-parameters was analyzed and optimized in the design process. The electron beam parameters with an outer diameter of 0.26 mm have relatively low accelerating voltage around 1.2 kV and beam current of 0.05 A (the current density is 94 A/cm $^{mathrm {mathbf {2}}}$ ). Under such conditions, numerical simulation results predict that the novel oscillator is capable of achieving the output peak power in excess of 154 mW and a tunable 3-dB bandwidth over 24 GHz in the range from 324 to 348 GHz. In addition, the machining and assembling methods of wire-wrap structure are another original invention for the physical processing of THz BWO.
Auteurs: Changpeng Xu;Yong Yin;Liangjie Bi;Zhang Zhang;Zhiwei Chang;Abdur Rauf;Safi Ullah;Bin Wang;Lin Meng;
Apparue dans: IEEE Transactions on Electron Devices
Date publication: 01.-2017, volume: 64, issue:1, pages: 293 - 299
Editeur: IEEE
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» A Numerical Methodology for the Analysis of Switched-Capacitor Filters Taking Into Account Non-Ideal Effects of Switches and Amplifiers
Résumé:
This paper presents an efficient numerical methodology to obtain the frequency response of switched-capacitor filters based on the circuits' differential equations. This methodology uses a non-hierarchical approach in which the non-ideal effects of the transistors (in the switches and in the amplifier) are taken into consideration, allowing the accurate computation of the frequency response, even in the case of incomplete settling in the SC branches. The accuracy is demonstrated by comparing the results obtained using the proposed methodology with those obtained using transient electrical simulation results for three different SC circuits: a first order SC passive filter, a second order SC lowpass filter, and a second order SC bandpass filter, showing that the results are in good agreement with the more time consuming electrical simulation of the circuits.
Auteurs: Hugo Serra;Rui Santos-Tavares;Nuno Paulino;
Apparue dans: IEEE Transactions on Circuits and Systems I: Regular Papers
Date publication: 01.-2017, volume: 64, issue:1, pages: 61 - 71
Editeur: IEEE
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» A Parallel Contour Integral Method for Eigenvalue Analysis of Power Systems
Résumé:
A parallelized numerical contour integral based method is proposed for counting interior eigenvalues in a given region on the complex plane. The proposed method is derived from descriptor system of power system linearized model and complex analysis theory, based on which the computation of eigenvalue number is converted to a set of matrix trace problems. The contour integral results are able to be utilized to detect missing target eigenvalues in partial eigenvalue methods and provide an approximate eigenvalue distribution along the integral curve. Efficient evaluation of integral function is implemented by exploiting the sparsity of descriptor systems. An adaptive integral point collocation strategy is proposed for numerically evaluating contour integral with moderate number of discretized points. As the computation of integral function is decoupled at each integral point, the proposed method features well parallel computing capability.
Auteurs: Yongjie Li;Guangchao Geng;Quanyuan Jiang;
Apparue dans: IEEE Transactions on Power Systems
Date publication: 01.-2017, volume: 32, issue:1, pages: 624 - 632
Editeur: IEEE
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» A Patient-Centric Sensory System for In-Home Rehabilitation
Résumé:
This paper presents a patient-centric rehabilitation practice monitoring sensory system, which operates based on monitoring rotational joints’ angle. At each joint, an inertial and a magnetometer sensors are simultaneously used to accurately measure a desired angle. Benefiting from a modified complementary filter to combine the results of both sensors, the root mean square errors of less than 1.6 and 1.7 degrees were calculated, respectively, for the static and dynamic evaluation tests. The outcome results show that the errors associated with both the static and dynamic evaluation are in turn ~ 22% and ~ 4.5% lower. To ensure the correctness of practices, the deviation of the measurement results (joint angle) from a known reference over time is considered as a qualification measure. Also, the obtained qualification measure is compared with the overall level of adenosine triphosphate generated in muscles, which is accounted for fatigue. The qualification measure can enable the developed system to calculate to the optimum velocity of specific movements.
Auteurs: Reza Abbasi-Kesbi;Alireza Nikfarjam;Hamidreza Memarzadeh-Tehran;
Apparue dans: IEEE Sensors Journal
Date publication: 01.-2017, volume: 17, issue:2, pages: 524 - 533
Editeur: IEEE
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» A Planar Dual-Polarized Microstrip 1-D-Beamforming Antenna Array for the 24-GHz Band
Résumé:
A planar linearly dual-polarized mm-wave antenna array is designed, fabricated, and investigated in detail. The requirements are two orthogonal polarizations with good purity and suitability of the array column for 1-D beamforming applications. Since single-layer fabrication without using vertical interconnection accesses is another important requirement, the chosen radiating elements are square microstrip patches, fed at two orthogonal edges. The array feeding is designed in series microstrip line fashion, providing a highly compact structure. In that way, 1-D beamforming agility is gained, when multiple array columns are arranged side by side and the individual columns are fed with appropriate phases. The sidelobe level of the array columns is decreased by implementing an amplitude taper within the series array, following the Dolph–Chebychev distribution. A fast scattering parameter calculation procedure is presented to achieve an efficient simulation and design process. The simulated and measured antenna properties are very stable over a bandwidth of 500 MHz around the center frequency proving that such a challenging dual-polarized design can be successfully implemented at millimeter-wave (mm-wave) frequencies with just one metallization layer on a grounded substrate. The design parameters and the design procedure are demonstrated in a step by step manner to give sufficient insight into the process together with the possibility of reusing the antenna array itself, as well as the underlying concepts.
Auteurs: Gerhard F. Hamberger;Stefan Trummer;Uwe Siart;Thomas F. Eibert;
Apparue dans: IEEE Transactions on Antennas and Propagation
Date publication: 01.-2017, volume: 65, issue:1, pages: 142 - 149
Editeur: IEEE
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» A Planar Integrated Folded Reflectarray Antenna With Circular Polarization
Résumé:
This communication presents the complete design of a circularly polarized (CP) folded reflectarray (FRA) antenna with an integrated planar structure for the first time in the open literature. To achieve circularly polarized, a printed meander-line polarizer is designed and integrated with the linearly polarized (LP) FRA. To achieve a low-profile planar structure, an integrated 2 \times 2 planar array is designed as the feed source instead of a horn. Thus, the whole antenna, including the feed source, LPFRA, and meander-line polarizer, can be fully integrated and fabricated using low-cost printed circuit board technology. To validate the concept, a right-handed CPFRA operating in C-band is designed, fabricated, and measured. The broadside axial ratio (AR) of the proposed CPFRA is lower than 1 dB over a bandwidth from 5.22 to 5.46 GHz. In addition, the maximum gain of 22.8 dBic is obtained at 5.38 GHz with the antenna efficiency of 27%. The antenna is promising for applications in satellite communication due to advantages of low profile, easy fabrication, low cost, and high gain.
Auteurs: Chong Zhang;Yongfeng Wang;Fuguo Zhu;Gao Wei;Jianzhou Li;Changying Wu;Steven Gao;Haitao Liu;
Apparue dans: IEEE Transactions on Antennas and Propagation
Date publication: 01.-2017, volume: 65, issue:1, pages: 385 - 390
Editeur: IEEE
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» A PMU Placement Scheme Considering Realistic Costs and Modern Trends in Relaying
Résumé:
Synchrophasor deployment costs have evolved over time. The cost of upgrading a substation, which is much larger than the cost of an individual device, has emerged as the primary constituent of the total expenditure. Given these circumstances, the optimal phasor measurement unit placement formulation needs to consider not only the number of devices that must be placed at the substations, but also the number of substations that must be upgraded to support those devices. This paper presents an integer linear programming methodology for such a placement scheme while considering realistic costs and practical constraints. The IEEE 30 bus system is used to illustrate the proposed concept, while the IEEE 118, IEEE 300, and Polish 2383 bus systems are used to show the performance of the method under different test environments.
Auteurs: Anamitra Pal;Anil Kumar S. Vullikanti;S. S. Ravi;
Apparue dans: IEEE Transactions on Power Systems
Date publication: 01.-2017, volume: 32, issue:1, pages: 552 - 561
Editeur: IEEE
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» A Polarization Parametric Method of Sensing the Scattering Signals From a Submicrometer Particle
Résumé:
In this letter, we report a new far-field polarization microscopic technique for detecting the scattering signals from a submicron particle. A diamond-like carbon submicrometer particle is imaged in terms of its scattered field intensity and polarization parameters involving the Stokes parameters. Our experimental results indicate that the proposed technique is able to resolve fine information from the anisotropic edge scattering of scatterers and also to quantitatively measure the scattered field spectra with an effective spatial range significantly extending beyond the conventional microscopy.
Auteurs: Kaleem Ullah;Xuefeng Liu;Xiong Jichuan;Jingjing Hao;Bin Xu;Zhao Jun;Weiping Liu;
Apparue dans: IEEE Photonics Technology Letters
Date publication: 01.-2017, volume: 29, issue:1, pages: 19 - 22
Editeur: IEEE
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» A Practical Feasibility Study of a Novel Strategy for the Gaussian Half-Duplex Relay Channel
Résumé:
This paper presents a practical feasibility study of a novel two-phase three-part-message strategy for half-duplex relaying, which features superposition coding and interference-aware cancellation decoding. Aiming to analyze the performance of the proposed scheme in the non-asymptotic regime, this paper evaluates the spectral efficiency with finite block-length and discrete constellation signaling and compares it with the theoretical performance of Gaussian codes with asymptotically large block-lengths. The performance evaluation is carried out on an LTE simulation test bench. During each transmission phase, the modulation and coding scheme is adapted to the channel link qualities to enhance the overall spectral efficiency. A single-antenna source and relay, and a multi-antenna destination are assumed. The static Gaussian and two frequency selective channel models are considered for the proposed scheme. A spectral efficiency comparison with a baseline scheme (non-cooperative two-hop transmission, i.e., the source-destination link is absent) and with the point-to-point transmission strategy (no relay) is presented. The results confirm that physical-layer cooperation and multi-antennas are critical for performance enhancement in heterogeneous networks. Moreover, they show that physical layer cooperation advantages are within practical reach with existing LTE coded-modulation and interference-mitigation techniques, which are prevalent in modern user-equipment.
Auteurs: Robin Rajan Thomas;Martina Cardone;Raymond Knopp;Daniela Tuninetti;Bodhaswar T. Maharaj;
Apparue dans: IEEE Transactions on Wireless Communications
Date publication: 01.-2017, volume: 16, issue:1, pages: 101 - 116
Editeur: IEEE
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» A Probabilistic Distance-Based Modeling and Analysis for Cellular Networks With Underlaying Device-to-Device Communications
Résumé:
Device-to-device (D2D) communications in cellular networks are promising technologies for improving network performance. However, they may cause severe intra/inter-cell interference that can considerably degrade the performance of cellular users, and vice versa. Therefore, interference analysis has been one of the most important research topics in such a system. Focusing on an uplink resource reusing scenario, this paper presents a framework based on a probabilistic distance and path-loss model to obtain the distributions of signal, interference, and further Signal-to-Interference-plus-Noise Ratio (SINR), based on which, the performance metrics that are functions of SINR can be analyzed, such as outage probability and capacity. Different from the previous work, this proposed framework: 1) obtains interference and SINR distributions for both cellular and D2D communications, through which insights into their performance metrics and mutual influence are provided and 2) has no limitations on cell shapes, except that they are approximated by polygons or circles. The framework can also be applied to a downlink reusing scenario. Our results indicate that the developed framework is helpful for network planners to effectively tune the network parameters, and thus to achieve the optimum system performance for both cellular and D2D communications.
Auteurs: Fei Tong;Ying Wan;Lei Zheng;Jianping Pan;Lin Cai;
Apparue dans: IEEE Transactions on Wireless Communications
Date publication: 01.-2017, volume: 16, issue:1, pages: 451 - 463
Editeur: IEEE
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» A QoS Aware Resource Allocation Strategy for Mobile Graphics Rendering With Cloud Support
Résumé:
With the rapid development of cloud technology, many services have been transferred from local computers to the cloud-based platform, which decreases the amount of computation done on the former. The local computer could thus be developed in the direction of portability and power saving. Graphics processing, apart from providing user interfaces featuring diversified special effects, is also significant in terms of application programs and play interactions. It is exactly on the basis of the concept of graphics processing that Cloud-support Rendering is developed, which is aimed to improve the graphics efficiency in mobile devices, via the graphics processing units on the cloud-based platform. The cloud-based platform and the mobile devices are usually connected by the Internet; however, as remote rendering might call for greater network bandwidth, its efficiency will be compromised if the network bandwidth is not stable. Given this limitation, this research sets out to propose a QoS aware resource allocation strategy for mobile 3D graphics rendering, which is a hybrid rendering technology combining the client-side graphics processing capabilities with the graphics processing units on the cloud-based platform. When network bandwidth is not stable, the technology is able to assess the current network bandwidth, and dynamically configure the rendered frames on the client side and cloud-based platforms. Even when the client side could not access the network, it would still be possible to carry out the drawing through the graphics processing units on the local computer. Three applications are tested in this research: technology can increase the frame rate by an average 44.99% when the bandwidth is 10% greater than the minimum limit, by an average 44.57% when the bandwidth is less than the minimum limit, by an average 30.86% when the bandwidth is 10% less than the minimum limit, and by an average 33.74% when the bandwidth is not stable.
Auteurs: Chin-Feng Lai;Ren-Hung Hwang;Han-Chieh Chao;
Apparue dans: IEEE Transactions on Circuits and Systems for Video Technology
Date publication: 01.-2017, volume: 27, issue:1, pages: 110 - 124
Editeur: IEEE
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» A Quality-of-Content-Based Joint Source and Channel Coding for Human Detections in a Mobile Surveillance Cloud
Résumé:
More than 70% of consumer mobile Internet traffic will be mobile video transmissions by 2019. The development of wireless video transmission technologies has been boosted by the rapidly increasing demand of video streaming applications. Although more and more videos are delivered for video analysis (e.g., object detection/tracking and action recognition), most existing wireless video transmission schemes are developed to optimize human perception quality and are suboptimal for video analysis. In mobile surveillance networks, a cloud server collects videos from multiple moving cameras and detects suspicious persons in all camera views. Camera mobility in smartphones or dash cameras implies that video is to be uploaded through bandwidth-limited and error-prone wireless networks, which may cause quality degradation of the decoded videos and jeopardize the performance of video analyses. In this paper, we propose an effective rate-allocation scheme for multiple moving cameras in order to improve human detection (content) performance. Therefore, the optimization criterion of the proposed rate-allocation scheme is driven by quality of content (QoC). Both video source coding and application layer forward error correction coding rates are jointly optimized. Moreover, the proposed rate-allocation problem is formulated as a convex optimization problem and can be efficiently solved by standard solvers. Many simulations using High Efficiency Video Coding standard compression of video sequences and the deformable part model object detector are carried, and results demonstrate the effectiveness and favorable performance of our proposed QoC-driven scheme under different pedestrian densities and wireless conditions.
Auteurs: Xiang Chen;Jenq-Neng Hwang;De Meng;Kuan-Hui Lee;Ricardo L. de Queiroz;Fu-Ming Yeh;
Apparue dans: IEEE Transactions on Circuits and Systems for Video Technology
Date publication: 01.-2017, volume: 27, issue:1, pages: 19 - 31
Editeur: IEEE
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» A Rapid Vibration Reduction Method for Macro–Micro Composite Precision Positioning Stage
Résumé:
A macro–micro composite precision positioning stage is mainly used in microelectronics manufacturing to achieve high velocity, high precision, and large-stroke positioning. The positioning accuracy and working efficiency of the stage are influenced by the inertial vibration caused by motion with high acceleration. This paper proposes an active vibration reduction (AVR) method employing a piezoelectric device for a designed macro–micro motion stage. The design model of the stage is established and its dynamic models are explored. The feasibility of the piezoelectric device as a vibration damper for the designed positioning stage is demonstrated through theoretical analyses, including natural frequency analysis and inertial vibration energy analysis. Furthermore, an optimal design of the stage with the AVR mechanism is established and then verified experimentally. The performance of the AVR method is examined and characterized through investigation of the differences in inertial vibration energy with and without the AVR, and the performance of the proposed method in terms of the vibration amplitude and positioning time is measured at different accelerations, velocities, and strokes. The theoretical and experimental analyses indicate the effectiveness of the proposed vibration reduction method, and this method could be employed in several applications that require vibration reduction.
Auteurs: Lanyu Zhang;Jian Gao;Xin Chen;Hui Tang;Yun Chen;Yunbo He;Zhijun Yang;
Apparue dans: IEEE Transactions on Industrial Electronics
Date publication: 01.-2017, volume: 64, issue:1, pages: 401 - 411
Editeur: IEEE
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» A Refreshing Take on Efficiency and Linearity [Book/Software Reviews]
Résumé:
This book follows the line of thinking that believes that there will always be a future for efficiency and linearity. The title may confuse readers at first because it does not use the typical buzzwords of envelope tracking, outphasing, or class-S. The author has a broader strategy in mind, and that is to back up a bit and give readers one book that looks at all the issues involved, as a power amplifier (PA) incorporates a dynamic power supply. There are several refreshing aspects of this book. It is not a literature review but a ground-up look at linear, envelope-tracking, and outphasing amplifiers. This consistency of approach and derivation from the fundamentals gives readers a rare perspective. Also, this book is full of practical insights. Many texts walk the reader through equations and derivations, but this book adds in many insights. There was an obvious effort on the part of the author to put a lot of thought and work went into producing this work. This book is highly recommended for students involved in high-efficiency PA design. And while it does not contain problems for students, I believe it will be a very useful text for educators because of the consistency of viewpoint and fundamental approach.
Auteurs: Alfy Riddle;
Apparue dans: IEEE Microwave Magazine
Date publication: 01.-2017, volume: 18, issue:1, pages: 112 - 125
Editeur: IEEE
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» A Resistance Drift Compensation Scheme to Reduce MLC PCM Raw BER by Over $100times $ for Storage Class Memory Applications
Résumé:
For multilevel cell (MLC) phase change memory (PCM), resistance drift (R-drift) phenomenon causes cell resistance to increase with time, even at room temperature. As a result, the fixed-threshold-retention (FTR) raw-bit-error-rate (RBER) surpasses practical ECC correction ability within hours after being programmed. This study proposes a resistance drift compensation (RDC) scheme to mitigate R-drift issue. The proposed RDC scheme realizes PCM drift compensation and features RDC pulse to suppress ECC decoding failure. The proposed approach was validated using a 90-nm 128M cells PCM chip and an FPGA-based memory controller verification system. The MLC PCM FTR RBER has been suppressed by over $100times $ , thereby bringing it within ECC capability. The effectiveness of the RDC scheme was verified up to $10^{6}$ cycles.
Auteurs: Win-San Khwa;Meng-Fan Chang;Jau-Yi Wu;Ming-Hsiu Lee;Tzu-Hsiang Su;Keng-Hao Yang;Tien-Fu Chen;Tien-Yen Wang;Hsiang-Pang Li;Matthew Brightsky;Sangbum Kim;Hsiang-Lan Lung;Chung Lam;
Apparue dans: IEEE Journal of Solid-State Circuits
Date publication: 01.-2017, volume: 52, issue:1, pages: 218 - 228
Editeur: IEEE
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» A Reverse Converter and Sign Detectors for an Extended RNS Five-Moduli Set
Résumé:
This paper deals with the extended five moduli set $ left({{2^{2n+p}, 2^{n}-1, 2^{n}+1, 2^{n}-2^{frac {n+1}{2}}+1, 2^{n}+2^{frac {n+1}{2}}+1}}right)$ where $n$ is a positive odd integer and $p$ is nonnegative integer such that $pleq frac {n-5}{2}$ . The paper proposes an efficient residue-to-binary converter along with a converter-based sign detector for this extended set. The paper also presents a residue-to-residue transformer that transforms the same five-moduli set to the three-moduli set $(2^{2n+p}, 2^{2n}-1, 2^{2n}+1)$ . Such a transformer enables the five-moduli set to utilize components that are (or will be) designed for the three-moduli set such as sign detectors.
Auteurs: Ahmad Hiasat;
Apparue dans: IEEE Transactions on Circuits and Systems I: Regular Papers
Date publication: 01.-2017, volume: 64, issue:1, pages: 111 - 121
Editeur: IEEE
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» A Segment-Based Storage and Transcoding Trade-off Strategy for Multi-version VoD Systems in the Cloud
Résumé:
Multi-version video-on-demand (VoD) providers either store multiple versions of the same video or transcode video to multiple versions in real time to offer multiple-bitrate streaming services to heterogeneous clients. However, this could incur tremendous storage cost or transcoding computation cost. There have been some works regarding trading off between transcoding and storing whole videos, but they did not take into account video segmentation and internal popularity. As a result, they were not cost-efficient. This paper introduces video segmentation and proposes a segment-based storage and transcoding trade-off strategy for multi-version VoD systems in the cloud. First, we split each video into multiple segments depending on the video internal popularity. Second, we describe the transcoding relationships among versions using a transcoding weighted graph, which can be used to calculate the version-aware transcoding cost from one version to another. Third, we take the video segmentation, version-aware transcoding weighted graph, and video internal popularity into account to propose a storage and transcoding trade-off strategy, which stores multiple versions of popular segments and transcodes unpopular segments. We then formulate it as an optimization problem and present a heuristic divide-and-conquer algorithm to get an approximate optimal solution. Finally, we conduct extensive simulations to evaluate the solution; the results show that it can significantly lower the storage and transcoding cost of multi-version VoD systems.
Auteurs: Hui Zhao;Qinghua Zheng;Weizhan Zhang;Biao Du;Haifei Li;
Apparue dans: IEEE Transactions on Multimedia
Date publication: 01.-2017, volume: 19, issue:1, pages: 149 - 159
Editeur: IEEE
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» A Semi-NMF-PCA Unified Framework for Data Clustering
Résumé:
In this work, we propose a novel way to consider the clustering and the reduction of the dimension simultaneously. Indeed, our approach takes advantage of the mutual reinforcement between data reduction and clustering tasks. The use of a low-dimensional representation can be of help in providing simpler and more interpretable solutions. We show that by doing so, our model is able to better approximate the relaxed continuous dimension reduction solution by the true discrete clustering solution. Experiment results show that our method gives better results in terms of clustering than the state-of-the-art algorithms devoted to similar tasks for data sets with different proprieties.
Auteurs: Kais Allab;Lazhar Labiod;Mohamed Nadif;
Apparue dans: IEEE Transactions on Knowledge and Data Engineering
Date publication: 01.-2017, volume: 29, issue:1, pages: 2 - 16
Editeur: IEEE
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» A Sensitivity Enhanced Microdisplacement Sensing Method Improved Using Slow Light in Fiber Bragg Grating
Résumé:
Fiber Bragg grating (FBG) sensors have been widely used in all industrial fields due to their advantages of small size, corrosion resistance, strong antijamming capability, and easy to reuse. Traditional FBG sensors can measure microdisplacement, but low sensitivity and resolution limit its applications in the field of precision measurement. There are sidelobes near the FBG bandgap whose transmittivity changes with wavelength, and the transmitted light has a huge group delay time due to the light here transmitting back and forth numerous times. This paper proposes and demonstrates a sensitivity enhanced microdisplacement sensor using slow light in FBGs through numerical simulations and experiments. A theoretical model of gratings is established by the coupled mode theory and transfer matrix method, and the mechanism of slow light generated in FBG is studied theoretically and also by numerical simulation analysis. This paper determined the set structure parameters of FBG by studying the slow light characteristics of different types of gratings with different structure parameters and influences of structure parameters on the FBG slow light characteristics. A microdisplacement sensing system is designed and built, and finally a sensitivity of 15.0786 mW/mm and a resolution of 66 nm are reached in the range of 0–60 \mu text{m} , which is 13 times more than the traditional grating sensing with light intensity demodulation.
Auteurs: Qi Wang;Mengjuan Guo;Yong Zhao;
Apparue dans: IEEE Transactions on Instrumentation and Measurement
Date publication: 01.-2017, volume: 66, issue:1, pages: 122 - 130
Editeur: IEEE
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» A Sensor for Simultaneous Measurement of Displacement and Temperature Based on the Fabry-Pérot Effect of a Fiber Bragg Grating
Résumé:
A temperature-insensitive sensor for micro displacement measurement is proposed based on a novel packaging of an FBG. In this paper, an apodized fiber Bragg grating (FBG) was glued at the specific position on the inner surface of a thin-walled ring. When the ring is deformed, the FBG could be split into two segments of FBGs in the two identical but oppositely directed chirp gradients. In this way, an effective Fabry–Pérot cavity could be induced into the FBG and the resonant peaks could be observed in the reflection spectrum of the FBG. The wavelength separation of the resonant peaks changes linearly with the change of displacement, while it is insensitive to temperature variation. The sensitivity of the wavelength separation versus displacement could be achieved as high as 117 pm mm−1 in the present experiment. Further improvement would be obtained by decreasing the radius or increasing the thickness of the ring. In addition, the ambient temperature could be obtained through a simple calculation, results in a temperature sensitivity of 28.67 pm °C−1. Owing to its compact and temperature independent advantages, the novel displacement sensor has potential application prospect in displacement and pressure measurements, especially in civil engineering structures as the long gauge sensor.
Auteurs: Sicong Tao;Xiaopeng Dong;Bowen Lai;
Apparue dans: IEEE Sensors Journal
Date publication: 01.-2017, volume: 17, issue:2, pages: 261 - 266
Editeur: IEEE
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» A Simple Method for Porosity Estimation at Nanoscale
Résumé:
Porous nanostructures have important applications in developing high-surface-area catalysts, sensors, and filters. It is difficult to accurately calculate porosity of nanomaterials using usual methods. Here, using the atomic force microscopy (AFM) topography, we introduce an interestingly simple method for calculating porosity of nanosized materials in three-dimensions based on the length correlation and average surface height difference. Computer simulations were used along with experimental results to test the validity of our proposed method. The porosity of the TiO2-nanowire-deposited silicon substrates was experimentally estimated from AFM-measured topography images. The corresponding computer simulations were carried out only for one crystallographic direction of the surface of the sample, for the surface is isotropic—there is no preferred direction at the surface—and we expect that simulations along an arbitrarily chosen cross section of the surface provide us with a full description of the entire surface. The results of the simulations were found to be in line with the results obtained by our proposed method from experimental data.
Auteurs: Saeideh Ramezani Sani;Meghdad Saeedian;Abdollah Mortezaali;G. R. Jafari;
Apparue dans: IEEE Transactions on Nanotechnology
Date publication: 01.-2017, volume: 16, issue:1, pages: 126 - 129
Editeur: IEEE
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