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Publications dans les journaux scientifiques dans le domaine de l'ingénierie : 12-2017 trié par par titre, page: 0
» ${Z}^{textsf {2}}$ -FET as Capacitor-Less eDRAM Cell For High-Density Integration
Résumé:
2-D numerical simulations are used to demonstrate the ${Z}^{textsf {2}}$ -FET as a competitive embedded capacitor-less dynamic random access memory cell for low-power applications. Experimental results in 28-nm fully depleted-silicon on insulator technology are used to validate the simulations prior to downscaling tests. Default scaling, without any structure optimization, and enhanced scaling scenarios are considered before comparing the bit cell area consumption and integration density with other eDRAM cells in the literature.
Auteurs: Carlos Navarro;Meng Duan;Mukta Singh Parihar;Fikru Adamu-Lema;Stefan Coseman;Joris Lacord;Kyunghwa Lee;Carlos Sampedro;Binjie Cheng;Hassan El Dirani;Jean-Charles Barbe;Pascal Fonteneau;Seong-Il Kim;Sorin Cristoloveanu;Maryline Bawedin;Campbell Millar
Apparue dans: IEEE Transactions on Electron Devices
Date publication: 12.-2017, volume: 64, issue:12, pages: 4904 - 4909
Editeur: IEEE
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» “All Good Things Must Come to an End”
Résumé:
In her final message as editor in chief of IEEE Pervasive Computing, Maria Ebling looks to the future and introduces who will come next as she passes the baton.
Auteurs: Maria R. Ebling;
Apparue dans: IEEE Pervasive Computing
Date publication: 12.-2017, volume: 16, issue:4, pages: 4 - 6
Editeur: IEEE
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» 1.1-kW Peak-Power Dissipative Soliton Resonance in a Mode-Locked Yb-Fiber Laser
Résumé:
We report an ytterbium-doped all-fiber laser generating dissipative soliton resonance (DSR) pulses with kilowatt-level peak power. The laser cavity was constructed with all-10/125 large-mode-area fibers to alleviate excessive nonlinear effects caused by high peak power. DSR pulse breaking and Raman-induced instability are avoided by carefully placing the fiber sections. Numerical and experimental investigation of high-peak-power DSR laser mode-locked with nonlinear optical loop mirrors is presented. Up to 1.66 W, 161-nJ energetic pulses are obtained without pulse-breaking. In particular, the laser generates pulses with 48–146 ps tunable pulse duration and an almost fixed peak power as high as 1.1 kW. To the best of our knowledge, this letter presents the first demonstration of DSR pulses with kilowatt-level peak power in mode-locked fiber lasers.
Auteurs: Jun-Hao Cai;Sheng-Ping Chen;Jing Hou;
Apparue dans: IEEE Photonics Technology Letters
Date publication: 12.-2017, volume: 29, issue:24, pages: 2191 - 2194
Editeur: IEEE
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» 1.29-W/mm2 23-dBm 66-GHz Power Amplifier in 55-nm SiGe BiCMOS With In-Line Coplanar Transformer Power Splitters and Combiner
Résumé:
This letter presents a four-way parallel–series power amplifier (PA) in 55-nm SiGe BiCMOS with in-line coplanar transformers for output power combining, and input/interstage power splitting. The in-line geometry allows an area efficient impedance matching design and an effective input signals routing to the individual PA stages without phase mismatch. The measurements show that the PA delivers a maximum output power of 23.4 dBm, an output-referred P1dB of 20 dBm, a gain of 23.8 dB, and a maximum power added efficiency of 12.5%, at 66 GHz, with a record power density (output power/active area) of 1.29 W/mm2 among PAs on silicon technologies operating beyond 40 GHz.
Auteurs: Domenico Pepe;Domenico Zito;Andrea Pallotta;Luca Larcher;
Apparue dans: IEEE Microwave and Wireless Components Letters
Date publication: 12.-2017, volume: 27, issue:12, pages: 1146 - 1148
Editeur: IEEE
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» 1.96-μm Tm:YAG Ceramic Laser
Résumé:
We have demonstrated an efficient diode-end-pumped continuous-wave Tm:YAG ceramic laser at 1962 nm using a compact two-mirror cavity. The laser oscillation at 1962 nm was realized by increasing the cavity loss at 2016 nm to limit oscillation with the strongest laser gain. For comparison, two different output couplers were used to build single wavelength lasers operating at 1962 and 2016 nm. A laser output power of 2.06 W at 1962 nm was achieved for an absorbed pump power of 6.59 W with the laser ceramic temperature maintained at 15 °C. The corresponding slope efficiency and conversion efficiency were calculated to be 37.8% and 31.3%, respectively. In contrast, the maximum output power at 2016 nm was approximately 3.47 W under the same conditions. The 1962 nm laser has potential application in the analysis of CO2 and HBr molecular gases.
Auteurs: Haiyong Zhu;Yongchang Zhang;Jing Zhang;Yaoju Zhang;Yanmin Duan;Xiukai Ruan;Jian Zhang;Dingyuan Tang;
Apparue dans: IEEE Photonics Journal
Date publication: 12.-2017, volume: 9, issue:6, pages: 1 - 7
Editeur: IEEE
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» 15-kV/40-A FREEDM Supercascode: A Cost-Effective SiC High-Voltage and High-Frequency Power Switch
Résumé:
High-voltage wide bandgap semiconductor devices such as the 15 kV SiC mosfet have attracted great attention because of their potential applications in high-voltage and high-frequency power converters. However, these devices are not commercially available at the moment, and their high cost due to expensive material growth and fabrication may limit their widespread adoption in the future. In this paper, a 15-kV 40-A SiC three-terminal power switch, the Future Renewable Electric Energy Delivery and Management (FREEDM) supercascode, is reported for the first time, which is based on a series connection of 1.2-kV SiC power devices. Compared with the monolithic 15-kV SiC mosfet, the FREEDM supercascode demonstrates obvious advantages in cost and thermal conductivity. The design and voltage-balancing mechanism of the FREEDM supercascode are introduced, and the performance including the voltage balancing, conduction characteristics over a wide range of temperatures, and dynamic switching performance, is analyzed. The FREEDM supercascode's low cost and excellent thermal dissipation capability will facilitate early applications of SiC in very high voltage and high frequency power converters.
Auteurs: Xiaoqing Song;Alex Q. Huang;Soumik Sen;Liqi Zhang;Pengkun Liu;Xijun Ni;
Apparue dans: IEEE Transactions on Industry Applications
Date publication: 12.-2017, volume: 53, issue:6, pages: 5715 - 5727
Editeur: IEEE
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» 2- $mu$ m Repetition-Rate Tunable (1–6 GHz) Picosecond Source
Résumé:
We have for the first time experimentally demonstrated a high repetition-rate picosecond fiber laser source at 2 $mu text{m}$ by a spectrally masked phase modulation technique, where a phase modulator driven by a sinusoidal RF signal and a fiber Bragg grating are used to convert the output of a 2- $mu text{m}$ continuous-wave single-longitudinal-mode diode to a picosecond pulse train. The repetition-rate of this laser source can be continuously and flexibly tuned from 1 to 6 GHz by simply changing the RF signal. We achieved a shortest pulse width of ~60 ps and a high SNR of >75 dB at an operating frequency of 6 GHz. The simplicity and robustness of such a picosecond laser as well as the ability to synchronize with an external trigger make it a highly useful source for 2- $mu text{m}$ high speed optical data processing, communications, and metrology.
Auteurs: Jiarong Qin;Yafei Meng;Wenbin Gao;Yao Li;Labao Zhang;Jinlong Xu;Shining Zhu;Fengqiu Wang;
Apparue dans: IEEE Photonics Technology Letters
Date publication: 12.-2017, volume: 29, issue:24, pages: 2234 - 2237
Editeur: IEEE
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» 2-D Drift-Diffusion Simulation of Organic Electrochemical Transistors
Résumé:
A 2-D device model of the organic electrochemical transistor is described and validated. Devices with channel length in range 100 nm–10 mm and channel thickness in range 50 nm– $textsf {5}mu text{m}$ are modeled. Steady-state, transient, and AC simulations are presented. Using the realistic values of physical parameters, the results are in good agreement with the experiments. The scaling of transconductance, bulk capacitance, and transient responses with device dimensions is well reproduced. The model reveals the important role of the electrical double layers in the channel, and the limitations of device scaling.
Auteurs: Marek Zdzisław Szymański;Deyu Tu;Robert Forchheimer;
Apparue dans: IEEE Transactions on Electron Devices
Date publication: 12.-2017, volume: 64, issue:12, pages: 5114 - 5120
Editeur: IEEE
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» 2.3-GHz HBT Power Amplifier With Parallel-Segmented On-Chip Autotransformer
Résumé:
A parallel-segmented primary autotransformer is proposed to optimize passive efficiency as well as impedance transformation ratio. In addition, a corresponding equivalent lumped model has been proposed and shows a good agreement with electromagnetic -simulated and measured data. This paper also presents a fully integrated HBT power amplifier with a parallel-segmented primary autotransformer to obtain watt-level output power with low loss. The saturated output power of the power amplifier (PA) is 31 dBm at 2.3 GHz. The PA achieves output power of 24.84 dBm with adjacent channel leakage ratio of less than −40.4 dBc for LTE signal with a 10-MHz bandwidth and 7.3-dB PAPR.
Auteurs: Hyunjin Ahn;Se-Eun Choi;Hyunsik Ryu;Seungjun Baek;Ilku Nam;Ockgoo Lee;
Apparue dans: IEEE Microwave and Wireless Components Letters
Date publication: 12.-2017, volume: 27, issue:12, pages: 1140 - 1142
Editeur: IEEE
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» 2017 at a Glance [Editor's Comments]
Résumé:
Presents the introductory editorial for this issue of the publication.
Auteurs: Mahta Moghaddam;
Apparue dans: IEEE Antennas and Propagation Magazine
Date publication: 12.-2017, volume: 59, issue:6, pages: 4 - 4
Editeur: IEEE
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» 2017 Holiday Gift Guide [Resources]
Résumé:
Auteurs: Stephen Cass;
Apparue dans: IEEE Spectrum
Date publication: 12.-2017, volume: 54, issue:12, pages: 19 - 21
Editeur: IEEE
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» 2017 International Symposium on Computer Architecture Influential Paper Award
Résumé:
This article discusses the 2017 ACM SIGARCH/IEEE-CS TCCA Influential ISCA Paper Award, which was given to the 2002 ISCA paper, “Drowsy Caches: Simple Techniques for Reducing Leakage Power.”
Auteurs: David Brooks;
Apparue dans: IEEE Micro
Date publication: 12.-2017, volume: 37, issue:6, pages: 90 - 91
Editeur: IEEE
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» 3-D Dual-Gate Photosensitive Thin-Film Transistor Architectures Based on Amorphous Silicon
Résumé:
In contrast to the conventional planar p-i-n photodiode and a metal-semiconductor–metal photodetector, the 3-D dual-gate photosensitive thin-film transistor (TFT) architectures presented here attain excellent photoresponse characteristics. Operating the device in the subthreshold regime further boosts the photoconductive gain as a result of light-induced decrease in the threshold voltage. This paper presents design considerations along with a performance comparison between 3-D photosensitive TFTs that have $pi $ - and FIN-shaped channels and conventional TFT with a planar channel. Our paper shows that the $pi $ -shaped structure tends to have a higher sensitivity while the FIN-shaped counterpart is more responsive with wider dynamic range. For both structures, a measured photoconductive gain of $10^{textsf {4}} sim 10^{textsf {6}}$ % is obtained with spectral responsivity ranging from near UV to near IR, and the photoresponse time in the range of tens of milliseconds. The 3-D dual-gate photosensitive TFT architecture appears to be very promising for large-area, low-level UV, visible, and IR detection applications.
Auteurs: Kai Wang;Hai Ou;Jun Chen;Arokia Nathan;Shaozhi Deng;Ningsheng Xu;
Apparue dans: IEEE Transactions on Electron Devices
Date publication: 12.-2017, volume: 64, issue:12, pages: 4952 - 4958
Editeur: IEEE
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» 3-D Printed Customizable Inserts for Waveguide Filter Design at X-Band
Résumé:
This letter presents the design of a customizable 3-D printed insert that can be placed into a standard WR-90 waveguide to realize an inline waveguide filter. These 3-D printed inserts have a significantly lower manufacturing cost and turnaround time compared to the conventional solid copper or bronze waveguide. A two-pole X-Band filter insert has been designed to demonstrate this unique approach. A Stratasys Fortus 400mc 3-D printer is used to print the exchangeable waveguide inserts with support material that is then removed using a basic lye solution. A seed layer of nickel is then spray coated on, and used to electroplate the inserts with copper. Measured results are in good agreement with simulation results for the two-pole bandpass filter with less than 1.05-dB insertion loss over X-Band. The weight of these inserts electroplated with copper is only 6.65 g. The ease and flexibility of this approach provides an excellent option for tuning and customizing filter designs with a fast turnaround using 3-D printing manufacturing technology.
Auteurs: Reena Dahle;Paul Laforge;John Kuhling;
Apparue dans: IEEE Microwave and Wireless Components Letters
Date publication: 12.-2017, volume: 27, issue:12, pages: 1080 - 1082
Editeur: IEEE
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» 3-D-Gaze-Based Robotic Grasping Through Mimicking Human Visuomotor Function for People With Motion Impairments
Résumé:
Objective: The goal of this paper is to achieve a novel 3-D-gaze-based human–robot-interaction modality, with which a user with motion impairment can intuitively express what tasks he/she wants the robot to do by directly looking at the object of interest in the real world. Toward this goal, we investigate 1) the technology to accurately sense where a person is looking in real environments and 2) the method to interpret the human gaze and convert it into an effective interaction modality. Looking at a specific object reflects what a person is thinking related to that object, and the gaze location contains essential information for object manipulation. Methods: A novel gaze vector method is developed to accurately estimate the 3-D coordinates of the object being looked at in real environments, and a novel interpretation framework that mimics human visuomotor functions is designed to increase the control capability of gaze in object grasping tasks. Results: High tracking accuracy was achieved using the gaze vector method. Participants successfully controlled a robotic arm for object grasping by directly looking at the target object. Conclusion: Human 3-D gaze can be effectively employed as an intuitive interaction modality for robotic object manipulation. Significance: It is the first time that 3-D gaze is utilized in a real environment to command a robot for a practical application. Three-dimensional gaze tracking is promising as an intuitive alternative for human–robot interaction especially for disabled and elderly people who cannot handle the conventional interaction modalities.
Auteurs: Songpo Li;Xiaoli Zhang;Jeremy D. Webb;
Apparue dans: IEEE Transactions on Biomedical Engineering
Date publication: 12.-2017, volume: 64, issue:12, pages: 2824 - 2835
Editeur: IEEE
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» 4–20 GHz GaAs True-Time Delay Amplifier MMIC
Résumé:
A wideband amplifier with a fine control of the true-time delay (TTD) has been successfully implemented using a commercial 0.5- $mu text{m}$ GaAs pHEMT monolithic microwave integrated circuit (MMIC) process. The proposed circuit effectively combines switching elements into an artificial transmission line structure in a distributed amplifier to achieve an adjustable TTD which enables time delay control with gain in a wider band than other GaAs-based TTD circuits. The TTD amplifier MMIC achieves a controllable delay of 9 ps, a gain of 9 to 2 dB, and a typical return loss of more than 10 dB from 4 to 20 GHz. The proposed TTD amplifier can be effectively integrated into a multifunction chip based on GaAs semiconductors for wideband active electronically scanned array or phased array systems.
Auteurs: Dong-Hwan Shin;In-Bok Yom;Dong-Wook Kim;
Apparue dans: IEEE Microwave and Wireless Components Letters
Date publication: 12.-2017, volume: 27, issue:12, pages: 1119 - 1121
Editeur: IEEE
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» 40-Gb/s PAM-4 Transmission Over a 40 km Amplifier-Less Link Using a Sub-5V Ge APD
Résumé:
Avalanche photodetectors (APDs) integrated in a silicon platform have the potential to significantly improve the link budget of optical links compared with conventional p-i-n photodetectors, while only requiring CMOS-friendly biasing voltages. We demonstrate an optical receiver based on a 1310nm <5V Germanium APD and a low-power transimpedance amplifier that offers a 5 to 6 dB sensitivity improvement compared with operation in PIN-mode. Sub-FEC transmission using PAM-4 in an amplifier-less link over more than 42km at 40Gb/s and over 10 km at 50 Gb/s is shown with a commercial directly modulated laser as transmitter.
Auteurs: Jochem Verbist;Joris Lambrecht;Bart Moeneclaey;Joris Van Campenhout;Xin Yin;Johan Bauwelinck;Gunther Roelkens;
Apparue dans: IEEE Photonics Technology Letters
Date publication: 12.-2017, volume: 29, issue:24, pages: 2238 - 2241
Editeur: IEEE
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» 64-Gb/s SSB-PAM4 Transmission Over 120-km Dispersion-Uncompensated SSMF With Blind Nonlinear Equalization, Adaptive Noise-Whitening Postfilter and MLSD
Résumé:
A novel low-complexity digital signal processing solution is presented to compensate the impairments of limited bandwidth and nonlinearity. It is based on the equalizer, adaptive noise-whitening postfilter, and maximum likelihood sequence detection (MLSD). The system performance loss is induced by higher noise power at the signal band edges after the equalizer can be mitigated by the postfilter and MLSD. Given the above structure, it is possible to enrich the equalizer by providing nonlinear compensation capability. A memory polynomial equalizer (MPE), instead of Volterra equalizer (VE), is applied as the equalizer to compensate the nonlinearity impairments in order to make a tradeoff between complexity and performance. For the adaption of MPE, the blindly adaptive multistep-size decision-directed least-mean-square algorithm is selected. By using a dual-drive Mach–Zehnder and direct detection, 64-Gb/s single-sideband 4-ary pulse amplitude modulation (SSB-PAM4) transmission over 120-km dispersion-uncompensated standard single-mode fiber (SSMF) with 10-dB bandwidth roughly 13.5 GHz is experimentally demonstrated. Given a 20% overhead soft-decision forward-error correction with bit error rate threshold of $2times 10^{{-2}}$, the dispersion-uncompensated SSMF transmission distance can be significantly increased from 40 to 120 km with the proposed receiver side solution. The optical signal noise ratio performances for different fiber reach and receiver structure are investigated. Furthermore, we compare the computational complexity of MPE with VE and conclude that MPE can substantially reduce computation complexity with negligible performance loss.
Auteurs: Zhiquan Wan;Jianqiang Li;Liang Shu;Songnian Fu;Yuting Fan;Feifei Yin;Yue Zhou;Yitang Dai;Kun Xu;
Apparue dans: Journal of Lightwave Technology
Date publication: 12.-2017, volume: 35, issue:23, pages: 5193 - 5200
Editeur: IEEE
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» 90 GHz CMOS Phased-Array Transmitter Integrated on LTCC
Résumé:
This paper presents the design of a 90 GHz phased-array transmitter front end on low-temperature co-fired ceramic (LTCC) technology. The monolithic microwave integrated circuit components have been fabricated by the CMOS technology and flip chipped on the LTCC to realize the transmitter front end. The dc and differential hybrid IF signals are provided to the flip-chipped components through the bias and IF lines designed on the LTCC. An $1 times 4$ patch antenna array has been designed for the transmitter and fabricated on the LTCC. The dc and IF signal pads on the LTCC were soldered to the designed printed circuit board pads for measurements. The measurement results show that by using a receiver horn antenna, the maximum received power at 92 GHz is −37.3 dBm at a communication distance of 1 m. The transmitter is capable of providing ±25° beam steering with respect to boresight and 20° half-power beamwidth at 90 GHz. The total power consumption of the transmitter front end is 656 mW.
Auteurs: Ali Vahdati;Antti Lamminen;Mikko Varonen;Jussi Säily;Markku Lahti;Kari Kautio;Manu Lahdes;Dristy Parveg;Denizhan Karaca;Kari A. I. Halonen;
Apparue dans: IEEE Transactions on Antennas and Propagation
Date publication: 12.-2017, volume: 65, issue:12, pages: 6363 - 6371
Editeur: IEEE
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» 900 V Reverse-Blocking GaN-on-Si MOSHEMTs With a Hybrid Tri-Anode Schottky Drain
Résumé:
In this letter, we present high-performance GaN-on-Si metal-oxide-semiconductor high electron mobility transistors with record reverse-blocking (RB) capability. By replacing the conventional ohmic drain with a hybrid tri-anode Schottky drain, a high reverse breakdown voltage ( ${V}_{text {B}}^{text {R}}$ ) of −900 V was achieved (at $1~mu text{A}$ /mm with grounded substrate), along with a small reverse leakage current ( ${I}_{text {R}}$ ) of ~20 nA/mm at −750 V. The devices also presented a small turn- on voltage ( ${V}_{{ mathrm{scriptscriptstyle ON}}}$ ) of 0.58 ± 0.02 V, a small increase in forward voltage ( $Delta {V}_{text {F}}$ ) of ~0.8 V, a high ON/OFF ratio over 1010, and a high forward breakdown voltage ( ${V}_{{{text {B}}}}^{{{text {F}}}}$ ) of 800 V at 20 nA/mm with grounded substrate. These results demonstrate a new milestone for RB GaN transistors, and open enormous opportunities for integrated GaN power devices.
Auteurs: Jun Ma;Minghua Zhu;Elison Matioli;
Apparue dans: IEEE Electron Device Letters
Date publication: 12.-2017, volume: 38, issue:12, pages: 1704 - 1707
Editeur: IEEE
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» In Situ Observation of Metal Properties in a Piezoresistive Pressure Sensor
Résumé:
Relaxation phenomena in metal interconnects are a potential source of drift in piezoresistive pressure sensors. Since the properties of a metal film are influenced by its fabrication process, it is of interest to study such phenomena in an environment that resembles a production device. For this purpose, a piezoresistive pressure sensor has been modified for characterization of thin film metallization. Extra metal has been placed on the passivation layer over the piezoresistors such that the strain in the metal can be controlled isothermally by applying a test pressure as well as by temperature. We show that the sensor output signal contains information on the stress development in the metal film. By limiting the design modification to one metal mask only, we have achieved a cost effective approach for characterization of metal properties with test structures that can be processed together with functional devices. [2017-0074]
Auteurs: Åsmund Sandvand;Einar Halvorsen;Henrik Jakobsen;
Apparue dans: Journal of Microelectromechanical Systems
Date publication: 12.-2017, volume: 26, issue:6, pages: 1381 - 1388
Editeur: IEEE
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» In-Situ Monitoring the Degradation of LEDs En Route the Visible Light Communication System
Résumé:
White light-emitting diodes (LEDs) offer the opportunity to realize energy efficient illumination and high-speed free-space visible light communication (VLC) simultaneously. The decrease of the optical power (OP) was usually used to characterize the degradation of LEDs, but the degradation does not always and only refers to a decrease in OP. This paper proposes using the characteristics parameters of VLC performances as in-situ indicators of the degradation of the LED light source itself. LED devices being intentionally stressed for 168 h at 120 °C and 85% relative humidity and 350 mA are used for demonstration. Stressing generates new defects in LED chips, which is accompanied by the decrease of frequency-response bandwidth and bit-error rate values of LEDs at the rated voltages. Compared with low-frequency light intensity noise characterization methods, the VLC system is something like to measure a dimming optical noise, featured by free-space measurement and compatibility with the existing illumination and wireless communication system.
Auteurs: Lilin Liu;Xiangying Zhang;Lu Li;Dongdong Teng;Gang Wang;
Apparue dans: IEEE Transactions on Device and Materials Reliability
Date publication: 12.-2017, volume: 17, issue:4, pages: 722 - 726
Editeur: IEEE
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» A $200~mu text{m}$ by $100~mu text{m}$ Smart Submersible System With an Average Current Consumption of 1.3nA and a Compatible Voltage Converter
Résumé:
In this paper, we present a novel microscale “Smart Dust” type system designed to operate in aqueous solutions, with a volume of $200~mu text{m} ,, times 100~mu text{m} ,, times $ 35 $mu text{m}$ , called a lablet. The lablet contains a 20Hz low-power clock generator, a sensor, electric actuators, and a simple finite state machine to implement a predefined response to the sensor input. It is designed to be rechargeable and to communicate via local contacts through aqueous solution either between lablets or with a docking station chip. The system operates with supply voltages ranging from 0.3 to 1.8V and is thus suitable to be supplied from a capacitor with decreasing voltage. An input rectifier allows powering the lablet independent of polarity. The average current consumption of the system was measured to be 1.3nA when supplied from a capacitor with an initial voltage of 1.8V. The small system scale allows the investigation of “pourable electronics”, a concept where large quantities of microsystems are deployed within a chemical solution to perform a predefined task. Several lablets have been designed and fabricated in a standard 180nm CMOS process and the electrical functionality has been verified by contacting the lablet electrodes with multiple probe needles. In order to use low voltage energy sources to supply the lablet, a voltage up-converter has been designed which is small enough to fit on the lablet.
Auteurs: Dominic A. Funke;Philipp Hillger;Jürgen Oehm;Pierre Mayr;Lukas Straczek;Nils Pohl;John S. McCaskill;
Apparue dans: IEEE Transactions on Circuits and Systems I: Regular Papers
Date publication: 12.-2017, volume: 64, issue:12, pages: 3013 - 3024
Editeur: IEEE
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» A $D$ -Band Low-Power Gain-Boosted Up-Conversion Mixer With Low LO Power in 40-nm CMOS Technology
Résumé:
This letter presents a $D$ -band low-power gain-boosted up-conversion mixer using the 40-nm comple- mentary metal–oxide–semiconductor technology. The proposed up-conversion mixer adopted gain-boost technique to improve conversion gain with a low local oscillator (LO) power. The resistive-feedback inverter was employed for wideband matching at intermediate-frequency ports. Broadband Marchand baluns were used to transform a single-ended signal to a differential signal at the RF and LO ports for measurement. The proposed up-conversion mixer demonstrated a measured conversion gain of −5 dB ± 1 dB at frequencies from 105 to 135 GHz with an ultralow LO power of −10 dBm. The average LO-RF isolation was −35 dB. The measured input P1dB compression point was −7.5 dBm. This core chip occupies $560 times 400,,mu text{m}^{2}$ and the total power consumption is 9 mW from a 1-V supply voltage.
Auteurs: Chae Jun Lee;Jin-Seob Kang;Chul Soon Park;
Apparue dans: IEEE Microwave and Wireless Components Letters
Date publication: 12.-2017, volume: 27, issue:12, pages: 1113 - 1115
Editeur: IEEE
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» A $K$ -Band High-Efficiency VCO Using Current Reused Technique
Résumé:
In this letter, we present a high-efficiency CMOS voltage control oscillator (VCO) at K-Band. In order to achieve high efficiency, we adopt center-tapped transformer and current reused technique to integrate cross couple pair and buffer amplifier. In addition, we put buffer amplifier gate bias at class AB to enhance efficiency. VCO tuning range is from 22.35 to 25.31 GHz. Across the VCO frequency range, peak output power and best efficiency are 4.37 dBm and 10.93%, respectively. Phase noise is better than −101 dBc/Hz at 1 MHz offset at all tuning range. Total dc power consumption is only 25 mW for 1.8-V supplied voltage. To our best knowledge, this VCO has excellent dc to RF efficiency at K-band.
Auteurs: Yu-Teng Chang;Hsin-Chia Lu;
Apparue dans: IEEE Microwave and Wireless Components Letters
Date publication: 12.-2017, volume: 27, issue:12, pages: 1134 - 1136
Editeur: IEEE
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» A 0.4-to-1 V Voltage Scalable $Delta Sigma $ ADC With Two-Step Hybrid Integrator for IoT Sensor Applications in 65-nm LP CMOS
Résumé:
This brief presents a two-step hybrid integrator (TSHI) that can operate at a wide supply voltage range, which is demonstrated with a third-order ${Delta Sigma }$ analog-to-digital converter (ADC). The proposed TSHI consists of a zero-crossing-detector (ZCD)-based integrator and an inverter-based integrator. In the coarse-integration step, the ZCD-based integrator performs a fast integration without concern for overshoot or detection delay issues. In the fine-integration step, the inverter-based integrator performs the residual integration with high accuracy. Hence, the TSHI provides fast and accurate integration process. In addition, the TSHI supports trade-off between voltage-scalable bandwidth and power consumption for an energy efficient operation of Internet-of-Things sensor nodes, owing to the scalable operation of the ZCD and inverter. The proposed ${Delta Sigma }$ ADC is fabricated in a 65-nm LP CMOS process, and the active area is 0.38 mm2. The fabricated ADC operates at supply voltages from 0.4 to 1 V. Depending on the supply voltage and sampling frequency, the power consumption and bandwidth of the ADC can be scaled from 12.7 to $948~{mu }{mathrm{W}}$ and from 7.5 to 400 kHz, respectively. The ADC maintains an SNDR higher than 60 dB within the operating supply range.
Auteurs: Jun-Eun Park;Young-Ha Hwang;Deog-Kyoon Jeong;
Apparue dans: IEEE Transactions on Circuits and Systems II: Express Briefs
Date publication: 12.-2017, volume: 64, issue:12, pages: 1417 - 1421
Editeur: IEEE
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» A 0.5erms Temporal Noise CMOS Image Sensor With Gm-Cell-Based Pixel and Period-Controlled Variable Conversion Gain
Résumé:
A deep subelectron temporal noise CMOS image sensor (CIS) with a Gm-cell based pixel and a correlated-double charge-domain sampling technique has been developed for photon-starved imaging applications. With the proposed technique, the CIS, which is implemented in a standard 0.18- $mu text{m}$ CIS process, features pixel-level amplification and achieves an input-referred noise of 0.5 erms with a correlated double sampling period of $5~ mu text{s}$ and a row read-out time of $10~mu text{s}$ . The proposed structure also realizes a variable conversion gain (CG) with a period-controlled method. This enables the read-out path CG and the noise-equivalent number of electrons to be programmable according to the application without any change in hardware. The experiments show that the measured CG can be tuned from $50~mu text{V}$ /e- to 1.6 mV/e- with a charging period from 100 ns to $4~mu text{s}$ . The measured characteristics of the prototype CIS are in a good agreement with expectations, demonstrating the effectiveness of the proposed techniques.
Auteurs: Xiaoliang Ge;Albert J. P. Theuwissen;
Apparue dans: IEEE Transactions on Electron Devices
Date publication: 12.-2017, volume: 64, issue:12, pages: 5019 - 5026
Editeur: IEEE
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» A 1.1- $mu text{m}$ 33-Mpixel 240-fps 3-D-Stacked CMOS Image Sensor With Three-Stage Cyclic-Cyclic-SAR Analog-to-Digital Converters
Résumé:
In this paper, a 1.1- $mu text{m}$ -pitch 33-Mpixel 240-fps backside-illuminated 3-D-stacked CMOS image sensor with three-stage cyclic-cyclic-successive-approximation-register (SAR) analog-to-digital converters (ADCs) is developed. The narrow-pitch interconnection technology that connects the pixels and arrayed ADCs inside the pixel area is described. The 3-D-stacked architecture, constructed using the interconnection technology, makes it possible to place a $textsf {1932} ~{(}textsf {H}{)} times textsf {4}~ {(}textsf {V}{)}$ correlated-double-sampling/ADC array underneath the pixel area. Furthermore, the pipelined and parallel operation of the three-stage cyclic-cyclic-SAR ADC architecture effectively reduces the conversion time period and power consumption and achieves 12-b precision within one horizontal scan time of $0.92~mu text{s}$ . As a result, the interconnection technology and ADC architecture achieved a high frame rate of 240 fps in 33 Mpixels. Random noise of 3.6 $text{e}^{-}$ and low power consumption of 3.0 W were attained at an extremely high pixel rate of 7.96 Gpixel/s. A good figure of merit is achieved compared with recently developed image sensors.
Auteurs: Toshiki Arai;Toshio Yasue;Kazuya Kitamura;Hiroshi Shimamoto;Tomohiko Kosugi;Sung-Wook Jun;Satoshi Aoyama;Ming-Chieh Hsu;Yuichiro Yamashita;Hirofumi Sumi;Shoji Kawahito;
Apparue dans: IEEE Transactions on Electron Devices
Date publication: 12.-2017, volume: 64, issue:12, pages: 4992 - 5000
Editeur: IEEE
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» A 10-bit DC-20-GHz Multiple-Return-to-Zero DAC With >48-dB SFDR
Résumé:
A dc-20-GHz multiple-return-to-zero digital-to-analog converter (DAC) is proposed for direct radio frequency synthesis. To minimize frequency-dependent amplitude and phase errors in the output summing node, which can dominate linearity performance at GHz and mm-wave frequencies, a vertically stacked tree (VST) and feed-forward (FF) path are proposed. While the VST minimizes variation in frequency response among the MSB cells, the FF path improves matching between the MSBs and LSBs, providing up to 21-dB improvement in simulated spurious-free dynamic range (SFDR) at 20 GHz. To account for additional errors introduced by process variation, the DAC utilizes per-cell calibration of both amplitude and timing. The DAC is implemented in a 0.13- $mu text{m}$ SiGe process with an area of 6.25 mm2 and consumes 1.91 W. After amplitude and timing calibration, >48-dB SFDR and lesser than −46 dBc intermodulation distortion are achieved from dc to 20 GHz.
Auteurs: Lucas Duncan;Brian Dupaix;Jamin J. McCue;Brandon Mathieu;Matthew LaRue;Vipul J. Patel;Mesfin Teshome;Myung-Jun Choe;Waleed Khalil;
Apparue dans: IEEE Journal of Solid-State Circuits
Date publication: 12.-2017, volume: 52, issue:12, pages: 3262 - 3275
Editeur: IEEE
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» A 10-Gb/s Optical Receiver With Sub-Microampere Input-Referred Noise
Résumé:
High-speed optical receivers realized in low-cost technology often suffer from unfavorable performance, dictated by the transimpedance limit, the key design constraint of shunt-shunt feedback transimpedance amplifier (TIA). In this letter, we propose a novel TIA architecture to overcome the transimpedance limit, achieving both low noise and high gain that are not realizable in a conventional topology. A 10-Gb/s optical receiver with sub-microampere input-referred noise current is implemented in a mature 0.18- $mu text{m}$ CMOS technology. Wire-bonded with a commercial III–V p-i-n photodiode, the receiver demonstrates the state-of-the-art input-referred noise current of 0.97 $mu $ Arms and a total transimpedance gain of 68.3 dB $Omega $ while consuming 45 mA from 1.8-V power supply. Finally, the proposed architecture is applicable to 10 Gb/s beyond to realize low-noise high-gain optical receivers.
Auteurs: Dan Li;Ming Liu;Li Geng;
Apparue dans: IEEE Photonics Technology Letters
Date publication: 12.-2017, volume: 29, issue:24, pages: 2268 - 2271
Editeur: IEEE
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» A 118-mW Pulse-Based Radar SoC in 55-nm CMOS for Non-Contact Human Vital Signs Detection
Résumé:
We report a direct-RF pulse-based radar System on Chip (SoC) with applications in vital signs monitoring and occupancy detection. The transmitter complies with FCC, ETSI, and KCC regulatory masks with −10 dB bandwidths of 1.4 and 1.5 GHz centered at 7.29 and 8.748 GHz. The receiver samples the reflected signal at 23.328 GS/s, covering a 9.9-m consecutive range. The measured front-end noise figure is 6.3 dB with 14.7-dB gain at 7.29 GHz. Chest movements from breathing and heartbeats in a human subject were detected at 9 and 5 m, respectively. All required power management and clock functions are integrated on-chip. The SoC was implemented in 55-nm CMOS. In active mode, the system consumes 118 mW from a 1.8-V power supply.
Auteurs: Nikolaj Andersen;Kristian Granhaug;Jørgen Andreas Michaelsen;Sumit Bagga;Håkon A. Hjortland;Mats Risopatron Knutsen;Tor Sverre Lande;Dag T. Wisland;
Apparue dans: IEEE Journal of Solid-State Circuits
Date publication: 12.-2017, volume: 52, issue:12, pages: 3421 - 3433
Editeur: IEEE
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» A 12-b 10-GS/s Interleaved Pipeline ADC in 28-nm CMOS Technology
Résumé:
A 12-bit 10-GS/s interleaved (IL) pipeline analog-to-digital converter (ADC) is described in this paper. The ADC achieves a signal to noise and distortion ratio (SNDR) of 55 dB and a spurious free dynamic range (SFDR) of 66 dB with a 4-GHz input signal, is fabricated in the 28-nm CMOS technology, and dissipates 2.9 W. Eight pipeline sub-ADCs are interleaved to achieve 10-GS/s sample rate, and mismatches between sub-ADCs are calibrated in the background. The pipeline sub-ADCs employ a variety of techniques to lower power, like avoiding a dedicated sample-and-hold amplifier (SHA-less), residue scaling, flash background calibration, dithering and inter-stage gain error background calibration. A push–pull input buffer optimized for high-frequency linearity drives the interleaved sub-ADCs to enable >7-GHz bandwidth. A fast turn-ON bootstrapped switch enables 100-ps sampling. The ADC also includes the ability to randomize the sub-ADC selection pattern to further reduce residual interleaving spurs.
Auteurs: Siddharth Devarajan;Larry Singer;Dan Kelly;Tao Pan;Jose Silva;Janet Brunsilius;Daniel Rey-Losada;Frank Murden;Carroll Speir;Jeffery Bray;Eric Otte;Nevena Rakuljic;Phil Brown;Todd Weigandt;Qicheng Yu;Donald Paterson;Corey Petersen;Jeffrey Gealow;Gabri
Apparue dans: IEEE Journal of Solid-State Circuits
Date publication: 12.-2017, volume: 52, issue:12, pages: 3204 - 3218
Editeur: IEEE
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» A 128-Channel FPGA-Based Real-Time Spike-Sorting Bidirectional Closed-Loop Neural Interface System
Résumé:
A multichannel neural interface system is an important tool for various types of neuroscientific studies. For the electrical interface with a biological system, high-precision high-speed data recording and various types of stimulation capability are required. In addition, real-time signal processing is an important feature in the implementation of a real-time closed-loop system without unwanted substantial delay for feedback stimulation. Online spike sorting, the process of assigning neural spikes to an identified group of neurons or clusters, is a necessary step to make a closed-loop path in real time, but massive memory-space requirements commonly limit hardware implementations. Here, we present a 128-channel field-programmable gate array (FPGA)-based real-time closed-loop bidirectional neural interface system. The system supports 128 channels for simultaneous signal recording and eight selectable channels for stimulation. A modular 64-channel analog front-end (AFE) provides scalability and a parameterized specification of the AFE supports the recording of various electrophysiological signal types with 1.59 ± 0.76 $mu {V}$ root-mean-square noise. The stimulator supports both voltage-controlled and current-controlled arbitrarily shaped waveforms with the programmable amplitude and duration of pulse. An empirical algorithm for online real-time spike sorting is implemented in an FPGA. The spike-sorting is performed by template matching, and templates are created by an online real-time unsupervised learning process. A memory saving technique, called dynamic cache organizing, is proposed to reduce the memory requirement down to 6 kbit per channel and modular implementation improves the scalability for further extensions.
Auteurs: Jongkil Park;Gookhwa Kim;Sang-Don Jung;
Apparue dans: IEEE Transactions on Neural Systems and Rehabilitation Engineering
Date publication: 12.-2017, volume: 25, issue:12, pages: 2227 - 2238
Editeur: IEEE
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» A 14-nm 0.14-psrms Fractional-N Digital PLL With a 0.2-ps Resolution ADC-Assisted Coarse/Fine-Conversion Chopping TDC and TDC Nonlinearity Calibration
Résumé:
A digital fractional-N phase-locked loop (PLL) is presented. It achieves 137- and 142-fs rms jitter integrating from 10 kHz to 10 MHz and from 1 kHz to 10 MHz, respectively. With a frequency multiplication ratio of 207.0019231 [digitally controlled oscillator (DCO) frequency is 50 kHz away from an integer multiple of the 26-MHz reference clock], a −78.6-dBc fractional spur is achieved for an output clock that runs at half of the DCO frequency. Time-to-digital converter (TDC) chopping technique, TDC fine conversion through successive approximation register analog-to-digital converters (SARADCs), and TDC nonlinearity calibration improve integrated phase noise and fractional spurs. This design meets the performance requirement of the 256-QAM $4 times 4$ MIMO LTE standard in 5-GHz ISM band and also the 5G cellular 64-QAM standard in 28-GHz band. This work, implemented in a 14-nm fin-shaped field effect transistor (FinFET) CMOS process, is integrated to a cellular RF integrated circuit supporting advanced carrier aggregation operation. This PLL draws 13.4 mW and occupies 0.257 mm2.
Auteurs: Chih-Wei Yao;Ronghua Ni;Chung Lau;Wanghua Wu;Kunal Godbole;Yongrong Zuo;Sangsoo Ko;Nam-Seog Kim;Sangwook Han;Ikkyun Jo;Joonhee Lee;Juyoung Han;Daehyeon Kwon;Chulho Kim;Shinwoong Kim;Sang Won Son;Thomas Byunghak Cho;
Apparue dans: IEEE Journal of Solid-State Circuits
Date publication: 12.-2017, volume: 52, issue:12, pages: 3446 - 3457
Editeur: IEEE
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» A 14-nm FinFET Logic CMOS Process Compatible RRAM Flash With Excellent Immunity to Sneak Path
Résumé:
In this paper, we have demonstrated an oxygen-vacancy-based bipolar RRAM on a pure logic 14-nm-node HKMG FinFET platform. A unit cell of the memory consists of a control transistor (FinFET) and a storage transistor (a second FinFET). The later performs as a bipolar RRAM. This unit cell can be integrated in an AND-type memory array. The memory cell has an ON/OFF ratio equal to 200 and 400 for the n-type and p-type FinFET RRAMs, respectively, endurance larger than 400 and 1000 times for n- and p-type devices, respectively, and the retention test for over 1 month under 125 °C temperature environment. To analyze the array performance of the AND-type FinFET RRAM at the circuit level, we have further discussed the issues of the sneak path and disturbance, in which an active-fin isolation of FinFET in an AND-type array has been suggested to minimize the leakage current induced by sneak paths. The results have shown a large window with up to 103 ON/OFF ratio, 30% standby power reduction, and 90% active power reduction with reference to the conventional AND-type array. As a result, the bipolar FinFET RRAM exhibits great potential for the embedded memory applications, in particular it can be extended to 28-nm HKMG and the FinFET platform beyond 14-nm technology node, to fill the Moore’s gap between the high-performance logic and the embedded memory.
Auteurs: E. Ray Hsieh;Yen Chen Kuo;Chih-Hung Cheng;Jing Ling Kuo;Meng-Ru Jiang;Jian-Li Lin;Hung-Wen Chen;Steve S. Chung;Chuan-Hsi Liu;Tse Pu Chen;Shih An Huang;Tai-Ju Chen;Osbert Cheng;
Apparue dans: IEEE Transactions on Electron Devices
Date publication: 12.-2017, volume: 64, issue:12, pages: 4910 - 4918
Editeur: IEEE
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» A 19 nV/ $surd$ Hz Noise 2- $mu text{V}$ Offset 75- $mu text{A}$ Capacitive-Gain Amplifier With Switched-Capacitor ADC Driving Capability
Résumé:
This paper describes a capacitive-gain amplifier (CGA) with common-mode (CM) sampling (CMS) and switched-capacitor driving capability. The CMS CGA defines the amplifier CM voltage in a single auto-zero phase that significantly reduces the CM settling time. A pre-charge technique and dynamic filtering are used to allow the CGA to drive a switched-cap analog-to-digital converter (ADC) directly that relaxes the speed requirement on CGA and reduces folded noise aliases due to ADC sampling. As a result, it achieves 19-nV/ $surd$ Hz noise density while dissipating 75 $mu text{A}$ . The 5 ppm/full-scale-range integral nonlinearity is achieved with programmable gain range from 1 to 128 with 2.7 to 3.6 V supply. It has 2 $mu text{V}$ typical offset and 0.81 ppm/°C max gain error drift. The CGA was implemented in a 0.18- $mu text{m}$ CMOS 1.8/3.3 V ultra low leakage technology and occupies only 0.53 mm2 die area.
Auteurs: Hanqing Wang;Gerard Mora-Puchalt;Colin Lyden;Roberto Maurino;Christian Birk;
Apparue dans: IEEE Journal of Solid-State Circuits
Date publication: 12.-2017, volume: 52, issue:12, pages: 3194 - 3203
Editeur: IEEE
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» A 190-GHz High-Gain, 3-dBm OP1dB Low DC-Power Amplifier in 250-nm InP HBT
Résumé:
We report a 190-GHz amplifier designed into a 250-nm InP HBT technology. The four-stage amplifier at 76-mW dc power $P_{mathrm {dc}}$ demonstrates 25-dB $S_{21}$ gain and 24-GHz 3-dB bandwidth. At 190-GHz operation, the saturated output power $P_{mathrm {sat}}$ is 9.7-mW with 9.4% PAE and 16.4-dB large-signal gain. The 1-dB gain compression power OP1dB is 3-dBm. Biased at 97-mW $P_{mathrm {dc}}$ using higher HBT collector voltage, the amplifier demonstrates 22.4-dB $S_{21}$ gain and 26-GHz 3-dB bandwidth. At 190-GHz operation, $P_{mathrm {sat}}$ increases to 12.7-mW with 9.5% PAE and 19.2-dB large-signal gain. The OP1dB is also 3 dBm. Very similar OP1dB, $P_{mathrm {sat}}$ , and PAE large-signal characteristics were observed at 185- and 195-GHz operation. This letter represents world-class efficiency and record 1.59-W/mm power density for an InP HBT amplifier operating at G-band, and it competes equally well with the state-of-the-art results demonstrated in advanced InP HEMT, SiGe HBT, and CMOS technologies.
Auteurs: Zach Griffith;Miguel Urteaga;Petra Rowell;
Apparue dans: IEEE Microwave and Wireless Components Letters
Date publication: 12.-2017, volume: 27, issue:12, pages: 1128 - 1130
Editeur: IEEE
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» A 2–22 GHz CMOS Distributed Power Amplifier With Combined Artificial Transmission Lines
Résumé:
This letter presents a novel compact distributed power amplifier (DPA) implemented in a 0.18- $mu text{m}$ CMOS technology. Two three-stage DAs are combined with their input artificial transmission lines (ATLs) shared to work as a preamplifier for broadband impedance matching and gain improvement, while two four-stage DAs are combined with their output ATLs shared to work as a medium-power amplifier for high output power in a wide frequency band. Measurement results show that the DPA provides 11.9-dB average associated gain from 1 to 23.8 GHz. The output power at 1-dB output compression point ( $textit {OP}_{mathrm {1~dB}})$ is more than 8.9 dBm over the frequency of 2–22 GHz, and the peak power-added efficiency is 10% with the $textit {OP}_{mathrm {1~dB}}$ of 14.5 dBm.
Auteurs: Ying Zhang;Kaixue Ma;
Apparue dans: IEEE Microwave and Wireless Components Letters
Date publication: 12.-2017, volume: 27, issue:12, pages: 1122 - 1124
Editeur: IEEE
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» A 2.4-GHz, Hybrid 10-Mb/s BPSK Backscatter and 1-Mb/s FSK Bluetooth TX With Hardware Reuse
Résumé:
This letter presents a hybrid architecture for wireless transmitters that reuses the same hardware and antenna to selectively operate in either backscatter or conventional modes, with a minimum of added complexity. A single FET stage is used as both a Class-C power amplifier for a conventional 2.4-GHz, 1-Mb/s frequency shift keying Bluetooth low energy (BLE) transmitter with peak efficiency $eta approx 78$ %, as well as a 10-Mb/s BPSK modulator in an ultralow power backscatter mode. A transmitter energy consumption of 81 nJ/b at an output power level of +14 dBm is achieved in the 1-Mb/s conventional mode, while only 32 pJ/b is required in the 10-Mb/s BPSK backscatter mode. It is shown that the data rate of the backscatter mode can be decoupled from the conventional mode, such that the backscatter link can operate at ten times the rate of the conventional link, while achieving over three orders of magnitude power savings. This approach is equally applicable to other communication standards, such as Wi-Fi (IEEE 802.11b), Zigbee (IEEE 802.15.4), and so on.
Auteurs: Matthew S. Reynolds;
Apparue dans: IEEE Microwave and Wireless Components Letters
Date publication: 12.-2017, volume: 27, issue:12, pages: 1155 - 1157
Editeur: IEEE
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» A 20-nW 0.25-V Inverter-Based Asynchronous Delta–Sigma Modulator in 130-nm Digital CMOS Process
Résumé:
This paper presents a new inverter-based architecture that implements an asynchronous delta–sigma modulator. Different from the classical architecture, it features an input transconductor that promotes a differential and high input impedance that makes it easier to interface with sensors and other front ends. Furthermore, an inverter-based relaxation oscillator accomplishes the required hysteresis through a charge redistribution process, which exhibits lower time delay than hysteretic comparators, besides saving power from quiescent biasing. The circuit has been implemented in 130-nm CMOS digital process using halo-implanted transistors. In addition, transistors are biased in weak inversion and are implemented using distributed layout to reduce power consumption besides mitigating halo-implants undesired effects. Supplied with 0.25 V, the proposed architecture consumes 20 nW with just −55 dB of third harmonic distortion, making it suitable for wearable biomedical applications where energy consumption, low bandwidth, and moderate resolution are required.
Auteurs: Gustavo Della Colletta;Luís H. C. Ferreira;Sameer R. Sonkusale;Giseli V. Rocha;
Apparue dans: IEEE Transactions on Very Large Scale Integration Systems
Date publication: 12.-2017, volume: 25, issue:12, pages: 3455 - 3463
Editeur: IEEE
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» A 22.5-to-32-Gb/s 3.2-pJ/b Referenceless Baud-Rate Digital CDR With DFE and CTLE in 28-nm CMOS
Résumé:
This paper presents a referenceless baud-rate clock and data recovery (CDR) incorporated with a continuous-time linear equalizer (CTLE) and one-tap decision feedback equalizer (DFE) to achieve data rates from 22.5 to 32 Gb/s across a channel with Nyquist loss ranging from 10.1 to 14.8 dB. The referenceless CDR includes a proposed frequency acquisition scheme that consists of two parts: frequency detection and frequency correction. Frequency detection is achieved by examining rising and falling data waveforms to detect discrepancies between the data rate and the locally recovered clock frequency. Frequency correction uses digitally adjustable asymmetry of the proposed adjustable baud-rate phase detector to correct any frequency error. The receiver is implemented in the TSMC 28-nm CMOS process with an analog front end consisting of a CTLE, sampling comparators, a digitally controlled oscillator, and a digital back end consisting of synthesized digital CDR logic. The open-loop frequency detector range is measured to be 39%. The closed-loop CDR capture range is measured to be 34%, limited by test equipment. The proposed frequency acquisition scheme improves the measured CDR capture range by up to $227times $ . At 32 Gb/s, the entire receiver consumes 102.04 mW, achieving energy consumption below 3.19 pJ/b.
Auteurs: Wahid Rahman;Danny Yoo;Joshua Liang;Ali Sheikholeslami;Hirotaka Tamura;Takayuki Shibasaki;Hisakatsu Yamaguchi;
Apparue dans: IEEE Journal of Solid-State Circuits
Date publication: 12.-2017, volume: 52, issue:12, pages: 3517 - 3531
Editeur: IEEE
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» A 28 Gb/s 1.6 pJ/b PAM-4 Transmitter Using Fractionally Spaced 3-Tap FFE and $G_{m}$ -Regulated Resistive-Feedback Driver
Résumé:
We presents an energy-efficient PAM-4 transmitter that provides a controlled output impedance, scalable output voltage swing, and fractionally spaced feed-forward equalization (FFE). By using a resistive-feedback output driver, the proposed PAM-4 transmitter can reduce the power dissipation in the pre-driver stages compared with conventional transmitters. It also offers a more straightforward implementation of a 3-tap FFE owing to the simple current-summing structure of the pre-driver. In addition, the output impedance of the proposed output driver is controlled by regulating the ${G} _{boldsymbol m}$ of the driver cell, which results in good signal integrity for high-speed operation without the use of peaking inductors. A prototype chip is fabricated in 28-nm CMOS technology and occupies an active area of 0.048 mm2. It achieves a data rate of 28 Gb/s, exhibiting the state-of-the-art energy efficiency of 1.59 pJ/b for the differential output swing of 207 mV.
Auteurs: Haram Ju;Moon-Chul Choi;Gyu-Seob Jeong;Woorham Bae;Deog-Kyoon Jeong;
Apparue dans: IEEE Transactions on Circuits and Systems II: Express Briefs
Date publication: 12.-2017, volume: 64, issue:12, pages: 1377 - 1381
Editeur: IEEE
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» A 28-GHz 32-Element TRX Phased-Array IC With Concurrent Dual-Polarized Operation and Orthogonal Phase and Gain Control for 5G Communications
Résumé:
This paper presents the first reported 28-GHz phased-array IC for 5G communications. Implemented in 130-nm SiGe BiCMOS, the IC includes 32 TRX elements and features concurrent independent beams in two polarizations in either TX or RX operation. Circuit techniques to enable precise beam steering, orthogonal phase and amplitude control at each front end, and independent tapering and beam steering at the array level are presented. A TX/RX switch design is introduced which minimizes TX path loss resulting in 13.5 dBm/16 dBm Op1dB/Psat per front end with >20% peak power added efficiency of the power amplifier (including switch and off-mode LNA) while maintaining a 6 dB noise figure in the low noise amplifier (including switch and off-mode PA). Comprehensive on-wafer measurement results for the IC across multiple samples and temperature variation are presented. A package with four ICs and 64 dual-polarized antennas provides eight 16-element or two 64-element concurrent beams with 1.4°/step beam steering (<0.6° rms error) across a ±50° steering range without requiring calibration. A maximum saturated effective isotropic radiated power of 54 dBm is measured in the broadside direction for each polarization. Tapering control without requiring calibration achieves up to 20-dB sidelobe rejection without affecting the main lobe direction.
Auteurs: Bodhisatwa Sadhu;Yahya Tousi;Joakim Hallin;Stefan Sahl;Scott K. Reynolds;Örjan Renström;Kristoffer Sjögren;Olov Haapalahti;Nadav Mazor;Bo Bokinge;Gustaf Weibull;Håkan Bengtsson;Anders Carlinger;Eric Westesson;Jan-Erik Thil
Apparue dans: IEEE Journal of Solid-State Circuits
Date publication: 12.-2017, volume: 52, issue:12, pages: 3373 - 3391
Editeur: IEEE
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» A 32-nm Subthreshold 7T SRAM Bit Cell With Read Assist
Résumé:
The implementation of the six-transistor (6T) static random access memory cell in deep submicrometer region has become difficult due to the compromise between area, power, and performance, with local and global variations only exacerbating the problem further. To impede the read–write conflict of the 6T cell, the seven-transistor (7T) cell with a noise-margin-free read operation has previously been proposed. But it severely lags in terms of its write ability at lower voltages due to its single-ended write operation. Its single-ended read operation also degrades severely in performance when operating in subthreshold (ST) region. To combat these problems, we propose a 7T cell which operates in the ST region down to 0.4 V with improved dynamic write ability. The novel topology also helps reduce power consumption by achieving a lower data retention voltage point. A read assist has been proposed to greatly enhance the performance of the single-ended read operation in ST region. Large improvements in various performance metrics of the proposed cell have been attained while simultaneously achieving a low area of $0.254~mu text{m}^{2}$ per bit cell on the 32-nm technology node.
Auteurs: Shourya Gupta;Kirti Gupta;Neeta Pandey;
Apparue dans: IEEE Transactions on Very Large Scale Integration Systems
Date publication: 12.-2017, volume: 25, issue:12, pages: 3473 - 3483
Editeur: IEEE
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» A 4-GS/s Single Channel Reconfigurable Folding Flash ADC for Wireline Applications in 16-nm FinFET
Résumé:
This brief presents a 4-GS/s single channel folding flash analog-to-digital converter (ADC) designed to be time-interleaved for wireline receivers in 16-nm FinFET CMOS. The resolution of the ADC is scalable to enable power savings depending on link modulation format (2 PAM/4 PAM) and link loss. A 1-bit folding stage determines the MSB, while the LSBs are determined by a 5-bit full flash where each comparator can be individually enabled/disabled. At 6-bit resolution, the ADC including a variable gain amplifier achieves an SNDR of 30.7 dB and an SFDR of 40.6 dB at Nyquist frequency while consuming 34.4 mW from a 0.9-V supply, yielding an FOM of 303 fJ/conv-step. At lower resolutions of 5, 4, and 3 bits, the FOM remains low at 295, 320, and 399 fJ/conv-step, respectively, at Nyquist frequency.
Auteurs: Luke Wang;Marc-Andre LaCroix;Anthony Chan Carusone;
Apparue dans: IEEE Transactions on Circuits and Systems II: Express Briefs
Date publication: 12.-2017, volume: 64, issue:12, pages: 1367 - 1371
Editeur: IEEE
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» A 40-Gb/s PAM-4 Transmitter Based on a Ring-Resonator Optical DAC in 45-nm SOI CMOS
Résumé:
The next generations of large-scale data-centers and supercomputers demand optical interconnects to migrate to 400G and beyond. Microring modulators in silicon-photonics VLSI chips are promising devices to meet this demand due to their energy efficiency and compatibility with dense wavelength division multiplexed chip-to-chip optical I/O. Higher order pulse amplitude modulation (PAM) schemes can be exploited to mitigate their fundamental energy–bandwidth tradeoff at the system level for high data rates. In this paper, we propose an optical digital-to-analog converter based on a segmented microring resonator, capable of operating at 20 GS/s with improved linearity over conventional optical multi-level generators that can be used in a variety of applications such as optical arbitrary waveform generators and PAM transmitters. Using this technique, we demonstrate a PAM-4 transmitter that directly converts the digital data into optical levels in a commercially available 45-nm SOI CMOS process. We achieved 40-Gb/s PAM-4 transmission at 42-fJ/b modulator and driver energies, and 685-fJ/b total transmitter energy efficiency with an area bandwidth density of 0.67 Tb/s/mm2. The transmitter incorporates a thermal tuning feedback loop to address the thermal and process variations of microrings’ resonance wavelength. This scheme is suitable for system-on-chip applications with a large number of I/O links, such as switches and general-purpose and specialized processors in large-scale computing and storage systems.
Auteurs: Sajjad Moazeni;Sen Lin;Mark Wade;Luca Alloatti;Rajeev J. Ram;Miloš Popović;Vladimir Stojanović;
Apparue dans: IEEE Journal of Solid-State Circuits
Date publication: 12.-2017, volume: 52, issue:12, pages: 3503 - 3516
Editeur: IEEE
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» A 40-to-56 Gb/s PAM-4 Receiver With Ten-Tap Direct Decision-Feedback Equalization in 16-nm FinFET
Résumé:
A 40–56 Gb/s PAM-4 receiver with ten-tap decision-feedback equalization (DFE) targeting chip-to-module and board-to-board cable interconnects is designed in 16-nm FinFET. The design implements direct feedback of the first post-cursor (h1) DFE tap to reduce the number of slicers. The h1 feedback signals are directly tapped from the master latch output of the StrongArm-based slicers. A CMOS amplifier with delayed pre-charge release is used to boost and pre-condition the h1 feedback signals before being applied to current-mode logic tap cell for optimum DFE summer settling time. The receiver achieves less than 1E-12 PRBS31 bit error rate (BER) over a channel with 10-dB loss at 14-GHz consuming 230 mW. Fully adapted by off-chip software, the receiver performance demonstrates the effectiveness of direct h1 loop and the need for higher DFE taps to achieve a required BER over channels with reflections. Receiver performance over higher loss channels up to 23 dB and/or under emulated cross-talk noise injection cases are also presented.
Auteurs: Jay Im;Dave Freitas;Arianne Bantug Roldan;Ronan Casey;Stanley Chen;Chuen-Huei Adam Chou;Tim Cronin;Kevin Geary;Scott McLeod;Lei Zhou;Ian Zhuang;Jaeduk Han;Sen Lin;Parag Upadhyaya;Geoff Zhang;Yohan Frans;Ken Chang;
Apparue dans: IEEE Journal of Solid-State Circuits
Date publication: 12.-2017, volume: 52, issue:12, pages: 3486 - 3502
Editeur: IEEE
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» A 400-MS/s 10-b 2-b/Step SAR ADC With 52-dB SNDR and 5.61-mW Power Dissipation in 65-nm CMOS
Résumé:
We present a single-channel 10-b 400-MS/s successive approximation register (SAR) analog-to-digital converter (ADC) embodying a proposed 2-b/step conversion scheme with single reference voltage for the IEEE 802.11ac. By means of the said scheme, the proposed ADC requires only three capacitor arrays instead of at least four capacitor arrays in other capacitor digital-to-analog converter-based 2-b/step SAR ADCs. The proposed ADC features a small input capacitance loading, thereby alleviating the driving requirement of the power-hungry input buffer in the IEEE 802.11ac system; and features a symmetrical architecture with highly matched interconnections. In addition, the proposed ADC embodies a proposed high-speed dynamic comparator with kickback noise cancelation and high-speed successive approximation (SA) control logic for high conversion rate and resolution. The proposed ADC prototype fabricated in 65-nm CMOS process achieves signal-to-noise-and-distortion-ratio >52 dB across 200-MHz Nyquist bandwidth, while dissipating 5.61-mW power. The ADC prototype, when benchmarked with state-of-the-art 2-b/step SAR ADCs, features a highly competitive figure-of-merit, i.e., 43 fJ/conv.step.
Auteurs: Qing Liu;Wei Shu;Joseph S. Chang;
Apparue dans: IEEE Transactions on Very Large Scale Integration Systems
Date publication: 12.-2017, volume: 25, issue:12, pages: 3444 - 3454
Editeur: IEEE
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» A 4th-Order Continuous-Time Delta-Sigma Modulator Using 6-bit Double Noise-Shaped Quantizer
Résumé:
This paper presents a continuous-time delta-sigma modulator using a double noise-shaped quantizer (DNSQ), which not only provides 2nd-order noise shaping but also generates a 6-bit quantization in the modulator. The proposed DNSQ efficiently extracts the quantization error in the time domain from a noise-shaped integrating quantizer (NSIQ), and directly applies it to a gated ring oscillator-based quantizer, hence achieving a 2nd order of noise shaping on its own. By incorporating the DNSQ, the modulator can achieve 4th-order noise shaping with only a 2nd-order loop filter. The proposed modulator is fabricated in a 0.13- $mu text{m}$ CMOS process with an active area of 0.17 mm2. It operates at 640 MHz and achieves a peak SNDR of 80.4 dB in a 15-MHz bandwidth while consuming 11.4 mW from a 1.2-V power supply.
Auteurs: Taewook Kim;Changsok Han;Nima Maghari;
Apparue dans: IEEE Journal of Solid-State Circuits
Date publication: 12.-2017, volume: 52, issue:12, pages: 3248 - 3261
Editeur: IEEE
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» A 50–66-GHz Phase-Domain Digital Frequency Synthesizer With Low Phase Noise and Low Fractional Spurs
Résumé:
Digital phase-locked loop (DPLL) frequency synthesizers have become popular for wireless applications in the sub-10-GHz range. However, mm-wave synthesizers still rely on analog PLLs, predominantly of the sub-harmonic, integer-N-type. This paper describes the design and implementation of a 50–66-GHz phase-domain DPLL that uses a fundamental frequency capacitively degenerated digitally controlled oscillator (DCO) with 40-kHz frequency step. Following frequency division with a modulus of only 4, a two-step 8-bit time-to-digital converter (TDC) digitizes the phase of the 12.5–16.5-GHz divider output with 450-fs resolution. Digital calibration based on the statistical element selection technique augmented by mean adaptation is used to mitigate TDC nonlinearity that results from random mismatches. Additional digital calibration techniques are introduced to mitigate DCO non-linearity and phase mismatches in the digital phase extraction sub-system, and to ensure robust operation of the inductor-less 4 $times $ frequency divider over process, voltage and temperature (PVT) variations. A 65-nm CMOS prototype of the DPLL occupies 0.45 mm2 excluding pads and consumes 46 mA from a 1-V supply. The PLL achieves best (worst) case rms jitter of 220 (302) fs, best (worst) phase noise of −83/−94.5/−122 (−79/−88/ −116) dBc/Hz at 0.1/1/10 MHz offset, and −52.2(−48.3) dBc fractional spur.
Auteurs: Ahmed I. Hussein;Sriharsha Vasadi;Jeyanandh Paramesh;
Apparue dans: IEEE Journal of Solid-State Circuits
Date publication: 12.-2017, volume: 52, issue:12, pages: 3329 - 3347
Editeur: IEEE
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» A 55.1 mW 1.62-to-8.1 Gb/s Video Interface Receiver Generating up to 680 MHz Stream Clock Over 20 dB Loss Channel
Résumé:
A 1.62-to-8.1 Gb/s video interface receiver with an adaptive equalizer and a stream clock generator (SCG) is proposed. The adaptation logic is achieved by an edge-based adaptation and it controls the continuous-time linear equalizer ac boost. Using the adaptation logic, the minimum BER point is selected for several cables. The SCG consists of a phase-switching fractional divider and a delta–sigma modulator. The dividing factor is determined by the display resolution and the SCG operates up to 680 MHz which is the 4K UHD pixel frequency. The proposed receiver is fabricated in 65-nm CMOS technology and occupies an active area of 0.282 mm2. The measured BER is less than $10^{-12}$ with a 20-ft-long video cable, whose insertion loss at 4.05 GHz is 20 dB. The receiver consumes 55.1 mW at the data rate of 8.1 Gb/s.
Auteurs: Kwanseo Park;Jinhyung Lee;Kwangho Lee;Min-Seong Choo;Sungchun Jang;Sang-Hyeok Chu;Sungwoo Kim;Deog-Kyoon Jeong;
Apparue dans: IEEE Transactions on Circuits and Systems II: Express Briefs
Date publication: 12.-2017, volume: 64, issue:12, pages: 1432 - 1436
Editeur: IEEE
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» A 60-GHz 360° 5-Bit Phase Shifter With Constant IL Compensation Followed by a Normal Amplifier With ±1 dB Gain Variation and 0.6-dBm OP $_{mathrm{ -1dB}}$
Résumé:
In this brief, a concise compensation technique to obtain constant insertion loss (IL) among different phase shifting states of an millimeter-wave switch-type phase shifter (PS) is developed. The main idea is to introduce switches into the PS to align ILs of all phase states to the maximum, which hardly introduces additional phase variation, degrades IL flatness, or deteriorates maximum IL. A 60-GHz 360° 5-bit switch-type PS is designed with the proposed technique in a 65-nm CMOS technology. Measured results show that the IL variation among all 32 phase shifting states is within ±0.8 dB over 57–66 GHz, with a maximum root-mean-square (rms) phase error of 8°, a gain tuning range of 8 dB and an input 1-dB power compression point (IP−1dB) of 13 dBm. The proposed PS followed by a 60-GHz normal amplifier with invariable gain is also designed and verified. A maximum gain of 4 dB is achieved with a gain variation within ±1 dB over a 9-GHz bandwidth, an output 1-dB power compression point (OP−1dB) of 0.6 dBm, a maximum rms phase error of 11.3°, and a dc power consumption of 30 mW.
Auteurs: Dong Huang;Lei Zhang;Di Li;Li Zhang;Yan Wang;Zhiping Yu;
Apparue dans: IEEE Transactions on Circuits and Systems II: Express Briefs
Date publication: 12.-2017, volume: 64, issue:12, pages: 1437 - 1441
Editeur: IEEE
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» A 64-Gb/s 1.4-pJ/b NRZ Optical Receiver Data-Path in 14-nm CMOS FinFET
Résumé:
A 64-Gb/s high-sensitivity non-return to zero receiver (RX) data-path is demonstrated in the 14-nm-bulk FinFET CMOS technology. To achieve high sensitivity, the RX incorporates a transimpedance amplifier whose gain and bandwidth are co-optimized with a 1-tap decision feedback equalization (DFE). The DFE, which operates at quarter-rate, features a look-ahead speculation to relax DFE timing to 4 unit-interval. The analog front end includes a transadmittance transimpedance inductorless variable gain amplifier, resulting in a low power and compact front end. The RX, wirebonded to a discrete GaAs photodiode, achieves an energy efficiency of 1.4 pJ/bit and −5-dBm optical modulation amplitude while recovering PRBS-7 data (bit-error-rate $<10^{-12}$ ) modulated by a VCSEL driver with a 2-tap feed forward equalization (FFE) (main + precursor) over 7 m of graded-index 50/125- $mu text{m}$ multimode fiber. The measured sensitivities at 56 and 32 Gb/s are −9- and −13-dBm optical modulation amplitude, respectively.
Auteurs: Ilter Ozkaya;Alessandro Cevrero;Pier Andrea Francese;Christian Menolfi;Thomas Morf;Matthias Brändli;Daniel M. Kuchta;Lukas Kull;Christian W. Baks;Jonathan E. Proesel;Marcel Kossel;Danny Luu;Benjamin G. Lee;Fuad E. Doany;Mounir Meghelli;Yusuf L
Apparue dans: IEEE Journal of Solid-State Circuits
Date publication: 12.-2017, volume: 52, issue:12, pages: 3458 - 3473
Editeur: IEEE
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» A 9-GS/s 1.125-GHz BW Oversampling Continuous-Time Pipeline ADC Achieving −164-dBFS/Hz NSD
Résumé:
An oversampled continuous-time (CT) pipeline ADC clocked at 9 GHz achieving 1.125-GHz bandwidth and −164 dBFS/Hz average small-signal noise density is presented. In contrast to traditional discrete-time (DT) pipeline ADCs, the system processes the signals in CT form throughout all the pipeline stages and thus sampling-induced artifacts such as aliasing and high-peak ADC driving current are mitigated. Despite the oversampled nature of the ADC, its digitization bandwidth is on par with that of traditional non-interleaved DT pipeline ADCs since CT signal processing is not constrained by settling time requirements. The ADC was fabricated in a 28-nm CMOS process technology and consumes 2.3 W.
Auteurs: Hajime Shibata;Victor Kozlov;Zexi Ji;Asha Ganesan;Haiyang Zhu;Donald Paterson;Jialin Zhao;Sharvil Patil;Shanthi Pavan;
Apparue dans: IEEE Journal of Solid-State Circuits
Date publication: 12.-2017, volume: 52, issue:12, pages: 3219 - 3234
Editeur: IEEE
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» A 95-nm-wide Tunable Two-Mode Vertical External Cavity Surface-Emitting Laser
Résumé:
We report on a wide tunability of an optically pumped semiconductor vertical external cavity surface-emitting laser with a unique two-mode resonant microcavity. Using only high-reflectivity mirrors in the resonator and controlling the active region temperature by readjustment of pump power and heat extraction, we have demonstrated a record 95-nm wavelength-tuning range. Laser center wavelength was 985 nm.
Auteurs: Artur Broda;Anna Wójcik-Jedlińska;Iwona Sankowska;Michał Wasiak;Marta Wieckowska;Jan Muszalski;
Apparue dans: IEEE Photonics Technology Letters
Date publication: 12.-2017, volume: 29, issue:24, pages: 2215 - 2218
Editeur: IEEE
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» A Belief-Evolution-Based Approach for Online Control of Fuzzy Discrete-Event Systems Under Partial Observation
Résumé:
In this paper, we investigate the partially observed supervisor synthesis problem in the framework of fuzzy discrete-event systems (DESs). The goal is to synthesize a fuzzy supervisor such that the behavior of the closed-loop system is within a given fuzzy language. A new approach for solving this problem is proposed based on the idea of belief evolution. Specifically, we propose an algorithm that can be implemented in an online manner. We show that the proposed algorithm is both sound and complete, i.e., it effectively solves the supervisor synthesis problem. To the best of our knowledge, this is the first algorithm with such a property for fuzzy DESs, as previous works on this topic mostly focus on the supervisor existence condition rather than the supervisor synthesis problem.
Auteurs: Xiang Yin;
Apparue dans: IEEE Transactions on Fuzzy Systems
Date publication: 12.-2017, volume: 25, issue:6, pages: 1830 - 1836
Editeur: IEEE
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» A Capstone Design Project on the Development of a Prototype Near-Field Antenna Measurement System [Education Corner]
Résumé:
This article presents the capstone design project of four final-year electrical and computer engineering undergraduate students, which focused on the development of a nearfield antenna measurement system from the ground up. The aim of this article is 1) to demonstrate that a prototype near-field antenna measurement system can be developed as a final-year capstone design project and 2) to show that the development of such a prototype can engage students with a multidisciplinary engineering design. To this end, this article discusses all the subsystems designed by the students to achieve full functionality for this prototype near-field antenna measurement system. Finally, the experimental validation of the system is presented, along with discussions on how to use this system for educational and research activities.
Auteurs: Chen Niu;Brent Schellenberg;Michael Kleiber;Jasper Taylor;Ahmad Byagowi;Puyan Mojabi;
Apparue dans: IEEE Antennas and Propagation Magazine
Date publication: 12.-2017, volume: 59, issue:6, pages: 118 - 127
Editeur: IEEE
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» A Catalytic Conversion: Westcom Showcases Her Science Talents
Résumé:
Twenty-three-year-old Alayna Westcom stood onstage in a white dress with a blue atom emblem, blue shoes, and lab glasses. On a table covered by a white tablecloth, she added hydrogen peroxide and potassium iodide to a little soap and then stepped back to watch. "Don't try this at home," she teased as white foam erupted onto the stage. It was a catalytic decomposition reaction that goes by the nickname "elephant's toothpaste." The hydrogen peroxide rapidly decomposes into water and oxygen gas, and when the gas gets trapped in the soap, voilá-bubbles, and a huge shot of foam.
Auteurs: Katianne Williams;
Apparue dans: IEEE Women in Engineering Magazine
Date publication: 12.-2017, volume: 11, issue:2, pages: 24 - 25
Editeur: IEEE
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» A Circuit-Based Approach for Characterizing High Frequency Electromigration Effects
Résumé:
A test chip for studying electromigration (EM) effects under various dc and ac stress conditions was implemented in a 32-nm-high-k metal gate process. The stress current, which can be either dc, pulsed dc, square ac, or real ac, was generated on-chip and applied to 60 devices under test (DUTs) in parallel. An on-chip voltage-controlled oscillator was designed to generate a stress frequency higher 1 GHz while on-chip metal gate heaters were used to raise the DUT temperature to >300 °C for accelerated testing. Both abrupt and progressive failures were observed under dc and pulsed dc stress modes. The abrupt failures could be further divided into two categories based on the final resistance value. Although no ac stress induced failures were observed during our extensive stress experiments, ac stress did have an impact on the subsequent dc EM lifetime. Two possible scenarios are given to explain the high frequency EM results.
Auteurs: Chen Zhou;Xiaofei Wang;Rita Fung;Shi-Jie Wen;Richard Wong;Chris H. Kim;
Apparue dans: IEEE Transactions on Device and Materials Reliability
Date publication: 12.-2017, volume: 17, issue:4, pages: 763 - 772
Editeur: IEEE
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» A Class-G Voltage-Mode Doherty Power Amplifier
Résumé:
This paper presents the combination of two back-off efficiency enhancement techniques, the voltage-mode Doherty and the class-G switched-capacitor power amplifier (PA), to achieve efficiency peaking at both 6 and 12 dB back off without introducing the mode-switching glitches present in previous architectures. The proposed technique enables transmission of high peak-to-average-power ratio (PAPR) signals with high efficiency while maintaining excellent linearity. The PA is fabricated in 45-nm CMOS SOI with integrated balun for power combining and matching. At 3.5 GHz a saturated output power of 25.3 dBm is measured with 30.4%/25.3%/17.4% power added efficiency (PAE) at 0/6/12 dB back off. With memoryless, non-adaptive linearization, the PA achieves 19.2% PAE with −35.8 dB error vector magnitude (EVM) while transmitting a 40 MHz 256-QAM 10.1 dB PAPR 802.11ac modulation. Significant efficiency improvement compared to class-B and EVM better than −34 dB is maintained over more than 1 GHz bandwidth.
Auteurs: Voravit Vorapipat;Cooper S. Levy;Peter M. AsbeckIEEE;
Apparue dans: IEEE Journal of Solid-State Circuits
Date publication: 12.-2017, volume: 52, issue:12, pages: 3348 - 3360
Editeur: IEEE
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» A Collaborative Learning Culture: Preparing K-12 Teachers for STEM Success [Pipelining: Attractive Programs for Women]
Résumé:
After teaching elementary and middle school science and art for just under a decade, Wendy Binder was looking for a challenge. With her unusual combination of bachelor's degrees in biology and chemistry, a master's of science in education, and experience teaching at the elementary school level, she first found career success as a curriculum developer for the National Science Resources Center, a joint venture between the Smithsonian and the National Academies. When the National Science Teachers Association (NSTA) decided to create a professional development department, Binder became its first hire by the department director. In her ten years there, she has worked with industry partners to implement sustainable programs that help teachers give students opportunities to learn the hard and soft skills they will need to be competitive in the science, technology, engineering, and mathematics (STEM) workforce.
Auteurs: Katianne Williams;
Apparue dans: IEEE Women in Engineering Magazine
Date publication: 12.-2017, volume: 11, issue:2, pages: 44 - 46
Editeur: IEEE
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» A Combined Power and Fault Analysis Attack on Protected Grain Family of Stream Ciphers
Résumé:
Differential fault analysis of stream ciphers, such as Grain (Grain v1 and Grain-128) has been an active area of research. Several countermeasures to thwart such analysis have been also proposed in the related cryptographic literature. In this paper, we demonstrate a novel combination of power and fault analysis strategies to devise attacks against such protected implementations of Grain stream cipher. We considered clock glitch induced faults occurring in practice to construct our fault model. In addition, we developed a generic power analysis attack technique against the Grain family of stream ciphers assuming that the cipher implementation can be resynchronized multiple times with a fixed secret key and any randomly generated initialization vector. Subsequently, we combine our proposed power analysis strategy with the notion of the practically occurring faults to mount attacks on various fault attack countermeasures. In order to validate our proposed power analysis attack, we report the results of power trace classifications of a Grain v1 implementation on SASEBO-GII board. The captured power traces were analyzed using least squares support vector machine learning algorithm-based multiclass classifiers to segregate the power traces into the respective Hamming distance (HD) classes. To extract power samples with high information about HD classes, signal-to-noise ratio (SNR) metric was chosen for feature selection. The experimental results of power trace classifications of test set showed success rate as high as 92.5% when the seven largest SNR sample instants over a clock cycle were chosen as features along with a suitable kernel hyperparameter combination.
Auteurs: Abhishek Chakraborty;Bodhisatwa Mazumdar;Debdeep Mukhopadhyay;
Apparue dans: IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Date publication: 12.-2017, volume: 36, issue:12, pages: 1968 - 1977
Editeur: IEEE
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» A Compact Memristor-CMOS Hybrid Look-Up-Table Design and Potential Application in FPGA
Résumé:
Due to the conventional look-up-table (LUT) using the static random access memory (SRAM) cell, field programmable gate arrays (FPGAs) almost reach the limitation in term of the density, speed, and configuration overhead. This paper proposes an improved memristor-based LUT (MLUT) circuit which is compatible with the mainstream LUT circuit in FPGA. Any arbitrary combined logic functions can be implemented in the MLUT through specific configurations. Then the MLUT shows superior advantages over the conventional LUT such as smaller area overhead and fewer data transmission. As a case study, a one-bit full adder is simulated to verify that the design is of practice in PSPICE. Moreover, the adder can be cascaded into multibit full adder demonstrating competitiveness against the conventional configurable logic block in FPGA technology. MLUT can be a candidate to replace the conventional SRAM-based LUT and further improves the performance of FPGAs.
Auteurs: Yanwen Guo;Xiaoping Wang;Zhigang Zeng;
Apparue dans: IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Date publication: 12.-2017, volume: 36, issue:12, pages: 2144 - 2148
Editeur: IEEE
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» A Compact Quasi-Static Terminal Charge and Drain Current Model for Double-Gate Junctionless Transistors and Its Circuit Validation
Résumé:
Junctionless transistors (JLTs) are presumed more scalable compared to other technologies, but its circuit performance is not fully understood. In this paper, we develop a charge-based compact model for a double-gate JLT(DGJLT) to explore the dc and the quasi-static performance of the transistor technology. First, 1-D Poisson’s equation is solved analytically by using the Lambert function to obtain the (sheet) charge density in the channel. Second, a continuous charge-based drain current model is derived for long-channel DGJLTs using the Pao-Sah’s dual integral. The model applies to all working regions (i.e., fully depleted, partly depleted, and accumulation). Third, based on the drain current, we develop the terminal charge model for ac and transient circuit simulation. Finally, the short-channel effect is modeled by adding an effective gate voltage to the proposed long-channel model. The compact model is validated by a numerical simulator over a wide range of voltage bias and device geometries. Results predicted by the analytical model agree well with numerical results. The model has been implemented in the Hspice circuit simulator with Verilog-A language and used to simulate a DGJLT inverter and oscillator without any convergence problem.
Auteurs: Chunsheng Jiang;Renrong Liang;Jun Xu;Muhammad Ashraful Alam;
Apparue dans: IEEE Transactions on Electron Devices
Date publication: 12.-2017, volume: 64, issue:12, pages: 4823 - 4830
Editeur: IEEE
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» A Comparative Study of InGaP/GaAs Collector-Up HBTs for High-Reliability Small-Scale PA Applications
Résumé:
In this paper, the characteristics of InGaP/GaAs collector-up (C-up) pnp and npn heterojunction bipolar transistors (HBTs) with the graded InGaAs base and the nonuniform doped collector are demonstrated, and the performances as well as the reliability of the novel HBTs have been compared with the conventional InGaP/GaAs HBTs with various collector structures and thermal schemes. Compared to conventional HBTs, the studied C-up HBTs exhibited better current-driving capability, higher RF efficiency, and improved long-term reliability. Note that the pnp device displayed greater thermal stability enhancements, which are distinct and reproducible, than the npn device. The favorable data of the pnp C-up HBT could be attributed to higher electron mobility, resulting in low base resistance and higher emitter resistance improving the thermal stability. The comparison results, based on pragmatic observations from the C-up HBTs without relatively large heat-dissipation configurations, should be very useful for the reliable and the cost-effective design as small-scale power amplifiers in the wideband CDMA system.
Auteurs: Jer-Lin Su;Hsien-Cheng Tseng;
Apparue dans: IEEE Transactions on Device and Materials Reliability
Date publication: 12.-2017, volume: 17, issue:4, pages: 678 - 682
Editeur: IEEE
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» A Comparative Study of Methods for Estimating Virtual Flux at the Point of Common Coupling in Grid-Connected Voltage Source Converters With LCL Filter
Résumé:
Grid synchronization based on virtual flux (VF) estimation allows for control of grid-connected power converter without depending on ac-voltage measurements. This is useful in voltage-sensor-less applications for reducing cost and complexity of the control hardware, and can be utilized in case of limited reliability or availability of voltage measurements at the intended point of synchronization to the grid. However, for voltage source converters (VSC) with LCL filters, the influence of the capacitor current must be taken into account to ensure accurate VF estimation at the point of common coupling (PCC) with the grid. This paper presents a comparative evaluation of three VF-based methods for grid synchronization of VSCs with LCL filters, with three different ways of obtaining the capacitor current. The VF estimation in the first method is based only on the measured converter currents. The second method includes capacitor voltage measurements used for estimating the capacitor currents, while the capacitor currents are measured in the third approach. Comparative results from time-domain simulations are presented, demonstrating good performance of the estimation and accurate control of the active and reactive power at the PCC with all three methods, as long as sufficiently accurate filter parameters and current measurements are available. However, the approach based on capacitor current measurements is sensitive to noise due to the high ripple current compared with the fundamental frequency current in the capacitors. The operation of a converter with VF-based grid synchronization including estimation of the capacitor current is demonstrated by experimental results, verifying the voltage sensor-less operation with LCL filter.
Auteurs: Nurul Fazlin Roslan;Jon Are Suul;Joan Rocabert;Pedro Rodriguez;
Apparue dans: IEEE Transactions on Industry Applications
Date publication: 12.-2017, volume: 53, issue:6, pages: 5795 - 5809
Editeur: IEEE
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» A Comparison Between Electrical Capacitance Tomography and Displacement-Current Phase Tomography
Résumé:
We compare electrical capacitance tomography (ECT) and displacement-current phase tomography (DCPT) results for non-invasive imaging of lossy media. ECT is based on mutual capacitance measurements between electrode pairs surrounding the region of interest (RoI), whereas DCPT is a relatively less mature sensing modality that utilizes the phase information inherent in the displacement current measured by such electrode pairs excited by time-harmonic voltages (in the electroquasistatic regime). DCPT and ECT can be implemented using basically the same hardware components and used alongside to provide complementary information for imaging purposes or separately to reconstruct the spatial distribution of the loss tangent or the permittivity within the RoI, respectively. We show that the (nonlinear) relationship between the measured phase in DCPT and the conductivity distribution in the RoI has a more extended linear range than the nonlinear relationship between the measured capacitances in ECT and the permittivity distribution in the RoI. Of note, DCPT does not require electrical contact with the RoI in contrast to electrical impedance tomography. To illustrate the potential of DCPT, we evaluate its performance using both numerical examples and experiment results.
Auteurs: Cagdas Gunes;Qussai M. Marashdeh;Fernando L. Teixeira;
Apparue dans: IEEE Sensors Journal
Date publication: 12.-2017, volume: 17, issue:24, pages: 8037 - 8046
Editeur: IEEE
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» A Comparison of Feature Representations for Explosive Threat Detection in Ground Penetrating Radar Data
Résumé:
The automatic detection of buried threats in ground penetrating radar (GPR) data is an active area of research due to GPR’s ability to detect both metal and nonmetal subsurface objects. Recent work on algorithms designed to distinguish between threats and nonthreats in GPR data has utilized computer vision methods to advance the state-of-the-art detection and discrimination performance. Feature extractors, or descriptors, from the computer vision literature have exhibited excellent performance in representing 2-D GPR image patches and allow for robust classification of threats from nonthreats. This paper aims to perform a broad study of feature extraction methods in order to identify characteristics that lead to improved classification performance under controlled conditions. The results presented in this paper show that gradient-based features, such as the edge histogram descriptor and the scale invariant feature transform, provide the most robust performance across a large and varied data set. These results indicate that various techniques from the computer vision literature can be successfully applied to target detection in GPR data and that more advanced techniques from the computer vision literature may provide further performance improvements.
Auteurs: Rayn Sakaguchi;Kenneth D. Morton;Leslie M. Collins;Peter A. Torrione;
Apparue dans: IEEE Transactions on Geoscience and Remote Sensing
Date publication: 12.-2017, volume: 55, issue:12, pages: 6736 - 6745
Editeur: IEEE
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» A Comparison of Indoor MIMO Measurements and Ray-Tracing at 24 and 2.55 GHz
Résumé:
Colocated $4times 4$ multiple-input multiple-output measurements at 2.55 and 24 GHz are presented for two university buildings consisting of classrooms and offices. Link gain in hallways and connected laboratories looks similar at the two frequencies when the effect of lower effective receive antenna aperture with increasing frequency is removed. Non-line-of-sight (NLOS) propagation through a wall or around hallway corners exhibits approximately 5–20 dB (11 dB on average) greater loss beyond the 20 dB aperture loss at 24 GHz compared to that at 2.55 GHz. Fixed directional antennas increase path loss (PL) by an average of 13 dB when misaligned. Capacity for normalized signal-to-noise ratio is very similar in the two bands and is close to that for the optimal independent identically distributed case, indicating sufficient multipath for spatial multiplexing at 24 GHz. A ray-tracing study suggests that material loss must increase from 2.55 to 24 GHz to correctly predict the higher PL at 24 GHz in severely obstructed scenarios, indicating a need for future material characterization in high microwave bands. The results suggest that 24 GHz is a viable option to replace medium-range (10–30 m) NLOS wireless services currently operating at 2.4 GHz.
Auteurs: Jon W. Wallace;Waseh Ahmad;Yahan Yang;Rashid Mehmood;Michael A. Jensen;
Apparue dans: IEEE Transactions on Antennas and Propagation
Date publication: 12.-2017, volume: 65, issue:12, pages: 6656 - 6668
Editeur: IEEE
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» A Comprehensive Evaluation of Software Rejuvenation Policies for Transaction Systems With Markovian Arrivals
Résumé:
Software rejuvenation is one of the proactive fault management techniques to prevent system performance degradation, which may lead to the system failure caused by software aging. In the design of software rejuvenation, it is important to determine the optimal timing of triggering the rejuvenation in terms of the system overhead. In this paper, we consider six software rejuvenation policies, which are categorized into time-based and workload-based policies, under the environment where the arrival stream of system follows a Markovian arrival process (MAP). After building the stochastic models with respective rejuvenation policies, we formulate the loss probability of transaction and the upper bound of mean response time as the system performance indices. In the numerical illustrations, we exhibit a comprehensive study to compare six software rejuvenation policies numerically and show that the proposed rejuvenation policies called wait-time policies are superior to the others under the MAP arrival stream.
Auteurs: Junjun Zheng;Hiroyuki Okamura;Lin Li;Tadashi Dohi;
Apparue dans: IEEE Transactions on Reliability
Date publication: 12.-2017, volume: 66, issue:4, pages: 1157 - 1177
Editeur: IEEE
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» A Computational Study of Vocal Fold Dehydration During Phonation
Résumé:
While vocal fold dehydration is often considered an important factor contributing to vocal fatigue, it still remains unclear whether vocal fold vibration alone is able to induce severe dehydration that has a noticeable effect on phonation and perceived vocal effort. A three-dimensional model was developed to investigate vocal fold systemic dehydration and surface dehydration during phonation. Based on the linear poroelastic theory, the model considered water resupply from blood vessels through the lateral boundary, water movement within the vocal folds, water exchange between the vocal folds and the surface liquid layer through the epithelium, and surface fluid accumulation and discharge to the glottal airway. Parametric studies were conducted to investigate water loss within the vocal folds and from the surface after a 5-min sustained phonation under different permeability and vibration conditions. The results showed that the dehydration generally increased with increasing vibration amplitude, increasing epithelial permeability, and reduced water resupply. With adequate water resupply, a large-amplitude vibration can induce an overall systemic dehydration as high as 3%. The distribution of water loss within the vocal folds was non-uniform, and a local dehydration higher than 5% was observed even under conditions of a low overall systemic dehydration (<1%). Such high level of water loss may severely affect tissue properties, muscular functions, and phonations characteristics. In contrast, water loss of the surface liquid layer was generally an order of magnitude higher than water loss inside the vocal folds, indicating that the surface dehydration level is likely not a good indicator of the systemic dehydration.
Auteurs: Liang Wu;Zhaoyan Zhang;
Apparue dans: IEEE Transactions on Biomedical Engineering
Date publication: 12.-2017, volume: 64, issue:12, pages: 2938 - 2948
Editeur: IEEE
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» A Consensus Process [Standards News]
Résumé:
Addresses the concept of consensus when discussing the development of standards. A Consensus Process Standards are a consensus opinion of a group of subject matter experts (SMEs) who document and share their skills with the general users, who may not be experts. Standards are learnings based on the past to provide directions for the future. Standards are the language used by SMEs to pass their experience and knowledge to the users. What is consensus? Business Dictionary defines consensus as Middle ground in decision making, between total assent and total disagreement. Consensus depends on participants having shared values and goals, and on having broad agreement on specific issues and overall direction. Consensus implies that everyone accepts and supports the decision, and understands the reasons for making it.
Auteurs: Daleep Mohla;
Apparue dans: IEEE Industry Applications Magazine
Date publication: 12.-2017, volume: 23, issue:6, pages: 71 - 81
Editeur: IEEE
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» A Context-Aware Architecture Supporting Service Availability in Mobile Cloud Computing
Résumé:
Mobile systems are gaining more and more importance, and new promising paradigms like Mobile Cloud Computing are emerging. Mobile Cloud Computing provides an infrastructure where data storage and processing could happen outside the mobile node. Specifically, there is a major interest in the use of the services obtained by taking advantage of the distributed resource pooling provided by nearby mobile nodes in a transparent way. This kind of systems is useful in application domains such as emergencies, education and tourism. However, these systems are commonly based on dynamic network topologies, in which disconnections and network partitions can occur frequently, and thus the availability of the services is usually compromised. Techniques and methods from Autonomic Computing can be applied to Mobile Cloud Computing to build dependable service models taking into account changes in the context. In this work, a context-aware software architecture is proposed to support the availability of the services deployed in mobile and dynamic network environments. The proposal is based on a service replication scheme together with a self-configuration approach for the activation/hibernation of the replicas of the service depending on relevant context information from the mobile system. To that end, an election algorithm has been designed and implemented.
Auteurs: Gabriel Guerrero-Contreras;José Luis Garrido;Sara Balderas-Díaz;Carlos Rodríguez-Domínguez;
Apparue dans: IEEE Transactions on Services Computing
Date publication: 12.-2017, volume: 10, issue:6, pages: 956 - 968
Editeur: IEEE
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» A Control Scheme to Minimize Muscle Energy for Power Assistant Robotic Systems Under Unknown External Perturbation
Résumé:
This paper proposes a novel control method to minimize muscle energy for power-assistant robotic systems that support the intended motions of a user under unknown external perturbations, using surface electromyogram (sEMG) signals. Conventional control methods based on force/torque (F/T) sensors have limitations to detect human intentions and could, presumably, misunderstand or distort such intentions because of external perturbations of the interaction forces, such as those found in activities of daily living. F/T sensors measure the sum of the applied force, including unknown external forces and human intention; thus, a power-assistant robot controller cannot exactly decompose the real human force. In this paper, we describe a counterexample that cannot be supported by conventional force-sensor-based control methods. We also verify why these control methods may guide human behavior in the wrong direction, and thus, have limitations under unknown external perturbations. We then propose a new control method to minimize the muscle energy indicated by sEMG signals. The proposed control approach is fundamentally based on the concept of power-assistance, in which a robot can reduce the users expended muscle energy while performing given tasks. The proposed control approach is verified through experiments using a power-assistant robotic system for the upper limbs under external perturbations.
Auteurs: Jaemin Lee;Minkyu Kim;Keehoon Kim;
Apparue dans: IEEE Transactions on Neural Systems and Rehabilitation Engineering
Date publication: 12.-2017, volume: 25, issue:12, pages: 2313 - 2327
Editeur: IEEE
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» A Decentralized Control Strategy for Economic Operation of Autonomous AC, DC, and Hybrid AC/DC Microgrids
Résumé:
Economic operation is a major concern for microgrids (MGs). System operation cost is optimized when the incremental costs (ICs) of all distributed generators (DGs) reach equality. Conventionally, economic dispatch of DGs is solved by centralized control with optimization algorithms or distributed control with consensus algorithms. To improve the reliability, scalability, and economy of MGs, a fully decentralized economic power sharing strategy is proposed in this paper. As frequency is a global state in ac MG and dc bus voltage serves as a natural indicator in dc MG, a frequency-IC droop scheme is proposed for ac MG, a voltage-IC droop scheme is proposed for dc MG, and a normalization scheme is proposed for hybrid ac/dc MG. By using the proposed technique, ICs of DGs reach equality with the convergence of the system global indicator (frequency or dc bus voltage). Then power sharing of each DG is automatically achieved based on its relevant IC function and the total operating cost can be optimized without any communication or central controllers. The proposed approach is implemented in an ac MG, a dc MG, and a hybrid ac/dc MG in MATLAB/Simulink to verify its effectiveness.
Auteurs: Qianwen Xu;Jianfang Xiao;Peng Wang;Changyun Wen;
Apparue dans: IEEE Transactions on Energy Conversion
Date publication: 12.-2017, volume: 32, issue:4, pages: 1345 - 1355
Editeur: IEEE
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» A Delay Time Model With Multiple Defect Types and Multiple Inspection Methods
Résumé:
We develop delay time models to determine optimal inspection policies for deteriorating infrastructures. We consider the case where complex infrastructures can fail due to different causes (defects) originating from various environmental or operational conditions, and capture this through modeling the arrival of different types of defects as nonhomogeneous Poisson processes with distinct rates of occurrence of defects. Additionally, we assume at each inspection epoch, there are multiple inspection methods available for use from which one is to be selected for use at that particular epoch. The key contribution that distinguishes our proposed models from previous works on delay time modeling is simultaneously considering multiple defect types and multiple inspection methods.

Two mixed-integer nonlinear programming models are introduced to address the problem described above. The first model focuses on determining the optimal inspection policy that maximizes the reliability of the system over its useful life subject to a minimal threshold value of this reliability term. The second model determines the optimal policy that minimizes the system downtime. The two models are solved using a branch-and-cut global optimization approach. Two separate numerical studies are conducted to demonstrate the performance of the models and validate it through benchmarking these results against a prior study in the literature.

Auteurs: Mohamad Mahmoudi;Alaa Elwany;Kamran Shahanaghi;Mohammad Reza Gholamian;
Apparue dans: IEEE Transactions on Reliability
Date publication: 12.-2017, volume: 66, issue:4, pages: 1073 - 1084
Editeur: IEEE
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» A Dictionary Learning-Based 3D Morphable Shape Model
Résumé:
Face analysis from 2D images and videos is a central task in many multimedia applications. Methods developed to this end perform either face recognition or facial expression recognition, and in both cases results are negatively influenced by variations in pose, illumination, and resolution of the face. Such variations have a lower impact on 3D face data, which has given the way to the idea of using a 3D morphable model as an intermediate tool to enhance face analysis on 2D data. In this paper, we propose a new approach for constructing a 3D morphable shape model (called DL-3DMM) and show our solution can reach the accuracy of deformation required in applications where fine details of the face are concerned. For constructing the model, we start from a set of 3D face scans with large variability in terms of ethnicity and expressions. Across these training scans, we compute a point-to-point dense alignment, which is accurate also in the presence of topological variations of the face. The DL-3DMM is constructed by learning a dictionary of basis components on the aligned scans. The model is then fitted to 2D target faces using an efficient regularized ridge-regression guided by 2D/3D facial landmark correspondences in order to generate pose-normalized face images. Comparison between the DL-3DMM and the standard PCA-based 3DMM demonstrates that in general a lower reconstruction error can be obtained with our solution. Application to action unit detection and emotion recognition from 2D images and videos shows competitive results with state of the art methods on two benchmark datasets.
Auteurs: Claudio Ferrari;Giuseppe Lisanti;Stefano Berretti;Alberto Del Bimbo;
Apparue dans: IEEE Transactions on Multimedia
Date publication: 12.-2017, volume: 19, issue:12, pages: 2666 - 2679
Editeur: IEEE
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» A Distance-Based Approach to Strong Target Control of Dynamical Networks
Résumé:
This paper deals with controllability of dynamical networks. It is often unfeasible or unnecessary to fully control large-scale networks, which motivates the control of a prescribed subset of agents of the network. This specific form of output control is known under the name target control. We consider target control of a family of linear control systems associated with a network, and provide both a necessary and a sufficient topological condition under which the network is strongly targeted controllable. Furthermore, a leader selection algorithm is presented to compute leader sets achieving target control.
Auteurs: Henk J. van Waarde;M. Kanat Camlibel;Harry L. Trentelman;
Apparue dans: IEEE Transactions on Automatic Control
Date publication: 12.-2017, volume: 62, issue:12, pages: 6266 - 6277
Editeur: IEEE
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» A Dynamic Mode Decomposition Based Edge Detection Method for Art Images
Résumé:
Edge detection is a widely used feature extraction method in various fields, such as image processing, computer vision, machine vision, and so forth. However, it is still a challenging task to extract edges from art images, due to the false edge, shadow, and double lines of art images. In this paper, we propose a dynamic mode decomposition algorithm (DMD) based method for edge detection of art images. This is achieved by proposing a new color space based denoise method to deal with the shadow issue. Then, the false edge and double lines can be resolved by employing DMD method, which can be used to extract sparse features from the denoised images. Here, the sparse features have been enhanced by a new designed eight direction gradient operator. Finally, the effectiveness of our method will be demonstrated through detecting the edges of three classical types of art images (Comic, Oil Painting, and Printmaking).
Auteurs: Chongke Bi;Ye Yuan;Ronghui Zhang;Yiqing Xiang;Yuehuan Wang;Jiawan Zhang;
Apparue dans: IEEE Photonics Journal
Date publication: 12.-2017, volume: 9, issue:6, pages: 1 - 13
Editeur: IEEE
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» A Feasibility Study of Low-Dose Single-Scan Dual-Energy Cone-Beam CT in Many-View Under-Sampling Framework
Résumé:
A single-scan dual-energy low-dose cone-beam CT (CBCT) imaging technique that exploits a multi-slit filter is proposed in this paper. The multi-slit filter installed between the x-ray source and the scanned object is reciprocated during a scan. The x-ray beams through the slits would generate relatively low-energy x-ray projection data, while the filtered beams would make high-energy projection data. An iterative image reconstruction algorithm that uses an adaptive-steepest-descent method to minimize image total-variation under the constraint of data fidelity was applied to reconstructing the image from the low-energy projection data. Since the high-energy projection data suffer from a substantially high noise level due to the beam filtration, we have developed a new algorithm that exploits the joint sparsity between the low- and high-energy CT images for image reconstruction of the high-energy CT image. The proposed image reconstruction algorithm uses a gradient magnitude image (GMI) of the low-energy CT image by regularizing the difference of GMIs of the low- and high-energy CT images to be minimized. The feasibility of the proposed technique has been demonstrated by the use of various phantoms in the experimental CBCT setup. Furthermore, based on the proposed dual-energy imaging, a material differentiation was performed and its potential utility has been shown. The proposed imaging technique produced promising results for its potential application to a low-dose single-scan dual-energy CBCT.
Auteurs: Donghyeon Lee;Jiseoc Lee;Hyoyi Kim;Taewon Lee;Jeongtae Soh;Miran Park;Changhwan Kim;Yeon Ju Lee;Seungryong Cho;
Apparue dans: IEEE Transactions on Medical Imaging
Date publication: 12.-2017, volume: 36, issue:12, pages: 2578 - 2587
Editeur: IEEE
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» A Flexible Decision-Making Mechanism Targeting Smart Thermostats
Résumé:
Buildings are immensely energy-demanding and are expected to consume even more in the near future. The operation of cooling/heating mechanisms highly contribute to this parameter, since nonoptimal configuration at temperature set-points usually leads to increased energy cost, as well as violations at occupant’s thermal comfort. In this letter, we introduce a flexible decision-making mechanism for supporting the proper configuration of these devices. The competitive advantage of our solution is the remarkable lower computational complexity without any degradation at the quality of derived decisions.
Auteurs: Charalampos Marantos;Kostas Siozios;Dimitrios Soudris;
Apparue dans: IEEE Embedded Systems Letters
Date publication: 12.-2017, volume: 9, issue:4, pages: 105 - 108
Editeur: IEEE
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» A Flexible Distributed Infrastructure for Real-Time Cosimulations in Smart Grids
Résumé:
Due to the increasing penetration of distributed generation, storage, electric vehicles, and new information communication technologies, distribution networks are evolving toward the smart grid paradigm. For this reason, new control strategies, algorithms, and technologies need to be tested and validated before their actual field implementation. In this paper, we present a novel modular distributed infrastructure, based on real-time simulation, for multipurpose smart grid studies. The different components of the infrastructure are described, and the system is applied to a case study based on a real urban district located in northern Italy. The presented infrastructure is shown to be flexible and useful for different and multidisciplinary smart grid studies.
Auteurs: Lorenzo Bottaccioli;Abouzar Estebsari;Enrico Pons;Ettore Bompard;Enrico Macii;Edoardo Patti;Andrea Acquaviva;
Apparue dans: IEEE Transactions on Industrial Informatics
Date publication: 12.-2017, volume: 13, issue:6, pages: 3265 - 3274
Editeur: IEEE
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» A Flexible Wildcard-Pattern Matching Accelerator via Simultaneous Discrete Finite Automata
Résumé:
Regular expression matching becomes indispensable elements of Internet of Things network security. However, traditional ternary content addressable memory (TCAM) search engine is unable to handle patterns with wildcards, as it precisely tracks only one active state with single transition. This paper proposes a promising simultaneous pattern matching methodology for wildcard patterns by two separated engines to represent discrete finite automata. A key preprocessing to encode possible postfix pattern by a unique key ensures that follow-up patterns can accurately traverse all possible matches with limited hardware resources. This approach is practical and scalable for achieving good performance and low space consumption in network security, and it can be applicable to any regular expressions even with multiwildcard patterns. The experimental results demonstrate that this scheme can efficiently and accurately recognize wildcard patterns by simultaneously tracking only two active states. By adopting SRAM TCAM in the proposed architecture, the energy consumption is reduced to around 39%, compared with the energy consumption using a computing system that contains a large memory lookup and comparison overhead.
Auteurs: Hsiang-Jen Tsai;Chien-Chih Chen;Yin-Chi Peng;Ya-Han Tsao;Yen-Ning Chiang;Wei-Cheng Zhao;Meng-Fan Chang;Tien-Fu Chen;
Apparue dans: IEEE Transactions on Very Large Scale Integration Systems
Date publication: 12.-2017, volume: 25, issue:12, pages: 3302 - 3316
Editeur: IEEE
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» A Fractional Delay Variable Frequency Repetitive Control for Torque Ripple Reduction in PMSMs
Résumé:
Based on the internal model principle, repetitive controller (RC) is capable of reducing periodic torque ripple by generating a compensating action that consequently needs to be synchronized with the original ripple. However, the synchronization is difficult to achieve using the conventional RC when the sampling frequency is not integer multiple of the speed (known as fractional delay issue) or when the speed varies widely. To solve this problem, this paper presents a fractional delay variable frequency torque ripple reduction method for permanent magnet synchronous machine drives using the combination of angle-based RC and deadbeat current control. Four aspects of innovations are included in the proposed control to improve the synchronization. The experimental results show that the proposed control can effectively reduce torque ripple, even during speed and load transient.
Auteurs: Mi Tang;Alberto Gaeta;Andrea Formentini;Pericle Zanchetta;
Apparue dans: IEEE Transactions on Industry Applications
Date publication: 12.-2017, volume: 53, issue:6, pages: 5553 - 5562
Editeur: IEEE
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» A Framework for Fast and Robust Visual Odometry
Résumé:
Knowledge of the ego-vehicle’s motion state is essential for assessing the collision risk in advanced driver assistance systems or autonomous driving. Vision-based methods for estimating the ego-motion of vehicle, i.e., visual odometry, face a number of challenges in uncontrolled realistic urban environments. Existing solutions fail to achieve a good tradeoff between high accuracy and low computational complexity. In this paper, a framework for ego-motion estimation that integrates runtime-efficient strategies with robust techniques at various core stages in visual odometry is proposed. First, a pruning method is employed to reduce the computational complexity of Kanade–Lucas–Tomasi (KLT) feature detection without compromising on the quality of the features. Next, three strategies, i.e., smooth motion constraint, adaptive integration window technique, and automatic tracking failure detection scheme, are introduced into the conventional KLT tracker to facilitate generation of feature correspondences in a robust and runtime efficient way. Finally, an early termination condition for the random sample consensus (RANSAC) algorithm is integrated with the Gauss–Newton optimization scheme to enable rapid convergence of the motion estimation process while achieving robustness. Experimental results based on the KITTI odometry data set show that the proposed technique outperforms the state-of-the-art visual odometry methods by producing more accurate ego-motion estimation in notably lesser amount of time.
Auteurs: Meiqing Wu;Siew-Kei Lam;Thambipillai Srikanthan;
Apparue dans: IEEE Transactions on Intelligent Transportation Systems
Date publication: 12.-2017, volume: 18, issue:12, pages: 3433 - 3448
Editeur: IEEE
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» A Framework for Patient State Tracking by Classifying Multiscalar Physiologic Waveform Features
Résumé:
Objective: state-of-the-art algorithms that quantify nonlinear dynamics in physiologic waveforms are underutilized clinically due to their esoteric nature. We present a generalizable framework for classifying multiscalar waveform features, designed for patient-state tracking directly at the bedside. Methods: an artificial neural network classifier was designed to evaluate multiscale waveform features against a fingerprint database of multifractal synthetic time series. The results are mapped into a physiologic state space for near real-time patient-state tracking. Results: the framework was validated on cardiac beat-to-beat dynamics processed with the multiscale entropy algorithm, and assessed using PhysioNet databases. We then applied our algorithm to predict 28-day mortality for sepsis patients, and found it had greater prognostic accuracy than standard clinical severity scores. Conclusion: we developed a novel framework to classify multiscale features of beat-to-beat dynamics, and performed an initial clinical validation to demonstrate that our approach generates a robust quantification of a patient's state, compatible with real-time bedside implementations. Significance: the framework generates meaningful and actionable patient-specific information, and could facilitate the dissemination of a new class of “always-on” diagnostic tools.
Auteurs: Benjamin Vandendriessche;Mustafa Abas;Thomas E. Dick;Kenneth A. Loparo;Frank J. Jacono;
Apparue dans: IEEE Transactions on Biomedical Engineering
Date publication: 12.-2017, volume: 64, issue:12, pages: 2890 - 2900
Editeur: IEEE
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» A Framework for Searching Internet-Wide Devices
Résumé:
Today, millions of physical devices are visible on the Internet through IP addresses, such as wearables, residential routers, cameras and industrial control devices. Users can access and control online devices, while attackers also target them, bringing potential security concerns. In this article, we propose a conceptual framework for discovering, recognizing and managing these online devices at the Internet-wide scale. It is the first work of Internet-wide device search, including three modules: network measurement, fingerprinting, and applications. We have implemented a prototype system and real-world experiments to illustrate the effectiveness of the framework. Furthermore, we explore the use and application of the system through searching camera devices in the whole IPv4 space. We deployed the system on Amazon EC2 to search for webcams and ICS devices nine times from April 2015 to April 2016, and we found 1.3 million webcams in total. In a comprehensive analysis of our dataset, we have characterized the use of online physical devices on the Internet.
Auteurs: Qiang Li;Xuan Feng;Lian Zhao;Limin Sun;
Apparue dans: IEEE Network
Date publication: 12.-2017, volume: 31, issue:6, pages: 101 - 107
Editeur: IEEE
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» A Frequency Tunable 360° Analog CMOS Phase Shifter With an Adjustable Amplitude
Résumé:
This brief presents a new vector sum phase shifter topology utilizing a current mode ${R}$ - ${C}$ poly phase filter along with several current steering variable gain amplifiers. The phase shifter performs all the tasks of vector generation, gain control, and vector summation in a single block (phase shifter core) to save power and area. The phase shifter core provides 360° of continuous phase tuning with an adjustable amplitude while consuming only 0.063 mm2 of on-chip area. The phase shifter can generate a signal with a tunable phase and magnitude in a phased array, thereby providing a better control over the beamwidth and sidelobe levels. The circuit is frequency reconfigurable, and its center frequency can be tuned within 26–28 GHz with an instantaneous bandwidth of 3 GHz. The phase shifter, fabricated in 130-nm CMOS technology, occupies an area of 0.284 mm2 (excluding the pads) and consumes 27 mW of power. The phase shifter’s RMS phase and gain errors for 64 measured phase states are less than 2.6° and 0.31 dB, respectively, within the 3-dB bandwidth. The measured IP1dB and IIP3 are larger than −9.8 and 0 dBm, respectively. This phase shifter is a good candidate for automotive radar as well as 5G applications.
Auteurs: Fatemeh Akbar;Amir Mortazawi;
Apparue dans: IEEE Transactions on Circuits and Systems II: Express Briefs
Date publication: 12.-2017, volume: 64, issue:12, pages: 1427 - 1431
Editeur: IEEE
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» A Full-Duplex Bidirectional Amplifier With Low DC Power Consumption Using Tunnel Diodes
Résumé:
A low-power, switchless, full-duplex bidirectional amplifier operating in the 915 MHz (industrial, scientific and medical band) is proposed. It is composed of two identical reflection amplifiers and one 90°, −3 dB branch line coupler (BLC). The reflection amplifiers are designed using low dc power consumption tunnel diodes and provide a measured reflection gain of 13 dB with consumed power of only $178~mu text{W}$ for −30 dBm of incident signal power. These reflection amplifiers are integrated with a miniaturized BLC to form a bidirectional amplifier that provides 9 dB of measured transmission gain and 22 dB of measured return loss.
Auteurs: Seiran Khaledian;Farhad Farzami;Danilo Erricolo;Besma Smida;
Apparue dans: IEEE Microwave and Wireless Components Letters
Date publication: 12.-2017, volume: 27, issue:12, pages: 1125 - 1127
Editeur: IEEE
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» A Fully Integrated Counter Flow Energy Reservoir for Peak Power Delivery in Small Form-Factor Sensor Systems
Résumé:
We present a fully integrated energy reservoir unit using a counter flow method for peak power delivery in space-constrained sensor systems. Recent advances in circuits have enabled significant reduction in the size of wireless systems such as implantable biomedical devices. As a consequence, the batteries integrated in these systems have also shrunk, resulting in high internal resistances ( $sim 10 ~text{k}Omega$ ). However, the peak current requirement of power-hungry components such as radios remains in the milliwatt range and hence cannot directly be supplied from the battery. Therefore, an energy reservoir with high output power but small size is required. We present an efficient energy reservoir that dynamically reconfigures a storage capacitor array using a so-called counter flow approach. By creating a voltage gradient on capacitor arrays and moving the capacitors along the slope of the gradient, the supply voltage can be maintained while the energy stored in the reservoir is delivered efficiently to the load. The counter flow energy reservoir delivers 65% of stored energy before recharging is needed which allows up to a $12 times$ reduction in overall capacitor size compared with our implementation of the previous method. The design supplies up to 13.6-mW output power for $1 ~mu text{s}$ . We demonstrate the proposed concept with a pulsed radio, showing an $11.5 times$ increase in pulse length compared with the previous method.
Auteurs: Xiao Wu;Kyojin Choo;Yao Shi;Li-Xuan Chuo;Dennis Sylvester;David Blaauw;
Apparue dans: IEEE Journal of Solid-State Circuits
Date publication: 12.-2017, volume: 52, issue:12, pages: 3155 - 3167
Editeur: IEEE
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» A GaN PA for 4G LTE-Advanced and 5G: Meeting the Telecommunication Needs of Various Vertical Sectors Including Automobiles, Robotics, Health Care, Factory Automation, Agriculture, Education, and More
Résumé:
The ever-increasing data rate and number of connections for mobile communication offer exciting user experiences in our everyday lives. Currently, the wireless communication frontier is shifting from the current fourth generation (4G) to the forthcoming fifth generation (5G). We expect much of society to go through a revolutionary change with the advent of the 5G era-a change that will involve not only the telecommunication industry but also a wide range of vertical sectors, including automobiles, robotics, health care, factory automation, agriculture, and education.
Auteurs: Rui Ma;Koon Hoo Teo;Shintaro Shinjo;Koji Yamanaka;Peter M. Asbeck;
Apparue dans: IEEE Microwave Magazine
Date publication: 12.-2017, volume: 18, issue:7, pages: 77 - 85
Editeur: IEEE
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» A Gbps Building-to-Building VLC Link Using Standard CMOS Avalanche Photodiodes
Résumé:
A building-to-building free-space visible-light-communication link over more than 72 m link distance is presented. The link employs a dual data/clock optical channel from two 680-nm vertical-cavity surface-emitting laser laser-diodes. The receivers are implemented using custom bandwidth-enhanced avalanche photodiodes (APD) in Austria-Micro-Systems 0.35 μm complementary-metal-semiconductor-oxide technology. The APD receiver uses resistive linearization to allow for improved bias voltage control in the soft-breakdown region as well as increased signal-to-noise ratio by around 6 dB. A simple amplifier-based architecture is employed with no equalization or transimpedance-amplifier use. Measurement results show an on–off-keying data rate of 2 Gb/s and forward-error-correction-compliant bit error rate below 3.8 × 10−3.
Auteurs: Bassem Fahs;Matthew Romanowicz;Mona M. Hella;
Apparue dans: IEEE Photonics Journal
Date publication: 12.-2017, volume: 9, issue:6, pages: 1 - 9
Editeur: IEEE
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» A Generalized Precharging Strategy for Soft Startup Process of the Modular Multilevel Converter-Based HVDC Systems
Résumé:
The modular multilevel converter (MMC) has become the most attractive converter technology for medium/high-power applications, specifically for high-voltage dc (HVdc) transmission systems. One of the technical challenges associated with the operation and control of the MMC-based system is to precharge the submodule (SM) capacitors to their nominal voltage during the startup process. In this paper, considering various SM circuits, a generalized precharging strategy is proposed for the MMC-based systems, which can implement soft startup from the dc or ac side. The proposed precharging strategy can be applicable for various SM circuits and MMC configurations. The proposed startup strategy does not require extra measurements and/or auxiliary power supplies. The charging current is controlled by adjusting the changing rate of the number of blocked and bypassed SM capacitors. Based on the proposed startup strategy, the startup processes of MMC/MMC-HVdc systems with various SM circuits are analyzed and a generalized startup procedure for various MMC-HVdc systems is proposed. In addition, the uncontrollable steady-state SM capacitor voltages of various MMC-based systems are analyzed and the associated precharging time is also investigated. Performance of the proposed strategy for various MMC-HVdc systems is evaluated based on time-domain simulation studies in the PSCAD/EMTDC software environment and experimental results are based on a scaled-down prototype.
Auteurs: Lei Zhang;Jiangchao Qin;Xiajie Wu;Suman Debnath;Maryam Saeedifard;
Apparue dans: IEEE Transactions on Industry Applications
Date publication: 12.-2017, volume: 53, issue:6, pages: 5645 - 5657
Editeur: IEEE
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» A Generative Audio-Visual Prosodic Model for Virtual Actors
Résumé:
An important problem in computer animation of virtual characters is the expression of complex mental states during conversation using the coordinated prosody of voice, rhythm, facial expressions, and head and gaze motion. In this work, the authors propose an expressive conversion method for generating natural speech and facial animation in a variety of recognizable attitudes, using neutral speech and animation as input. Their method works by automatically learning prototypical prosodic contours at the sentence level from an original dataset of dramatic attitudes.
Auteurs: Adela Barbulescu;Rémi Ronfard;Gérard Bailly;
Apparue dans: IEEE Computer Graphics and Applications
Date publication: 12.-2017, volume: 37, issue:6, pages: 40 - 51
Editeur: IEEE
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» A Generator-Converter Topology With Zero DC-Link Impedance for Direct Drive Wind Turbines
Résumé:
A new topology is proposed for direct drive wind turbines that eliminates the use of the failure prone dc-bus electrolytic capacitor, avoids the need for a dc-link inductor by utilizing the synchronous inductance of the wind turbine permanent-magnet generator (PMG), and provides a low-voltage generator design, which decreases the amount of permanent-magnet material used in PMG, and reduces the volume and weight of the generator.
Auteurs: Akanksha Singh;Behrooz Mirafzal;
Apparue dans: IEEE Transactions on Energy Conversion
Date publication: 12.-2017, volume: 32, issue:4, pages: 1620 - 1623
Editeur: IEEE
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» A Glimpse into the World of FinTech Accelerators?The Open Vault at OCBC
Résumé:
Financial technology (FinTech) has been garnering increased attention in recent years. The financial services industry that provides various types of financial, banking, and insurance services to customers (both individual or corporate) is showing more interest in adopting technology to innovate and grow. Technology, especially information systems, is not alien to this industry. According to the work of Garbade and Silber, telecommunication was first introduced into bank markets back in 1846. This helped reduce stock price differentials between New York and geographically dispersed regional stock markets. Similarly, the introduction of the transatlantic cable in 1866 enabled a securities trade originating from the United Kingdom and destined for the U.S. market to be completed in one day rather than the usual six.
Auteurs: Sharad Sinha;
Apparue dans: IEEE Potentials
Date publication: 12.-2017, volume: 36, issue:6, pages: 20 - 23
Editeur: IEEE
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» A GPU-Architecture Optimized Hierarchical Decomposition Algorithm for Support Vector Machine Training
Résumé:
In the last decade, several GPU implementations of Support Vector Machine (SVM) training with nonlinear kernels were published. Some of them even with source codes. The most effective ones are based on Sequential Minimal Optimization (SMO). They decompose the restricted quadratic problem into a series of smallest possible subproblems, which are then solved analytically. For large datasets, the majority of elapsed time is spent by a large amount of matrix-vector multiplications that cannot be computed efficiently on current GPUs because of limited memory bandwidth. In this paper, we introduce a novel GPU approach to the SVM training that we call Optimized Hierarchical Decomposition SVM (OHD-SVM). It uses a hierarchical decomposition iterative algorithm that fits better to actual GPU architecture. The low decomposition level uses a single GPU multiprocessor to efficiently solve a local subproblem. Nowadays a single GPU multiprocessor can run thousand or more threads that are able to synchronize quickly. It is an ideal platform for a single kernel SMO-based local solver with fast local iterations. The high decomposition level updates gradients of entire training set and selects a new local working set. The gradient update requires many kernel values that are costly to compute. However, solving a large local subproblem offers an efficient kernel values computation via a matrix-matrix multiplication that is much more efficient than the matrix-vector multiplication used in already published implementations. Along with a description of our implementation, the paper includes an exact comparison of five publicly available C++ SVM training GPU implementations. In this paper, the binary classification task and RBF kernel function are taken into account as it is usual in most of the recent papers. According to the measured results on a wide set of publicly available datasets, our proposed approach excelled significantly over the other meth- ds in all datasets. The biggest difference was on the largest dataset where we achieved speed-up up to 12 times in comparison with the fastest already published GPU implementation. Moreover, our OHD-SVM is the only one that can handle dense as well as sparse datasets. Along with this paper, we published the source-codes at https://github.com/OrcusCZ/OHD-SVM.
Auteurs: Jan Vaněk;Josef Michálek;Josef Psutka;
Apparue dans: IEEE Transactions on Parallel and Distributed Systems
Date publication: 12.-2017, volume: 28, issue:12, pages: 3330 - 3343
Editeur: IEEE
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» A Graph Theory Based Energy Routing Algorithm in Energy Local Area Network
Résumé:
The energy Internet concept has been considered as a new development stage of the smart grid, which aims to increase the energy transmission efficiency and optimize the energy dispatching in time and space. Energy router is a core device in the energy Internet and it connects all the devices together into a net structure and manages power flows among them. The research work presented in this paper described the energy router's structure and function expectations from the network perspective, and improved the existing energy router design. Open shortest path first (OSPF) protocol and virtual circuit switching mode are referenced from the Internet in the energy local area network (e-LAN) design. This paper proposed a design of an energy routing algorithm based on graph theory in an e-LAN. A lowest cost routing selection algorithm is designed according to the features of power transmission, and a source selection and routing design algorithm is proposed for very heavy load conditions. Both algorithms have been verified by case analyses.
Auteurs: Ruichi Wang;Jiande Wu;Zhongnan Qian;Zhengyu Lin;Xiangning He;
Apparue dans: IEEE Transactions on Industrial Informatics
Date publication: 12.-2017, volume: 13, issue:6, pages: 3275 - 3285
Editeur: IEEE
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» A Graph-Based Vehicle Proposal Location and Detection Algorithm
Résumé:
The majority of the existing appearance-based vehicle-detection systems make use of a sliding-window paradigm for vehicle-candidate regions location. In order to locate all vehicle regions with various sizes and shapes, a large number of search windows are generated by a sliding-window paradigm in most vehicle-detection systems. It is desirable to obtain fewer and more precisely located vehicle candidate regions for further detection. For this purpose, a novel graph-based algorithm is proposed to locate the vehicle proposal regions, which estimates the possibility of a vehicle contained in a bounding box. Experimental results on the public traffic analysis data set (KITTI) and PASCAL VOC 2007 show that the proposed region proposal approach leads to better performances compared with popular bottom-up region proposal methods. Moreover, the proposed vehicle-detection system is evaluated on the KITTI data set, which are determined to be satisfactory, even for the images containing vehicles that have undergone scale variations and camera viewpoint changes, as well as for images that were photographed with complex backgrounds.
Auteurs: Xue Yuan;Shuai Su;Houjin Chen;
Apparue dans: IEEE Transactions on Intelligent Transportation Systems
Date publication: 12.-2017, volume: 18, issue:12, pages: 3282 - 3289
Editeur: IEEE
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» A Graphic Look at Katherine Young: Allowing People to See Information [Amperes: Current Affairs from Around the World]
Résumé:
Katherine Young will tell you that her work as a graphic artist only has the chance to influence people for one second. Much of her work is seen in passing, out of the corner of the eye-it's on Facebook and Instagram, in print magazines, on postcards, posters, or e-mail.
Auteurs: Katianne Williams;
Apparue dans: IEEE Women in Engineering Magazine
Date publication: 12.-2017, volume: 11, issue:2, pages: 7 - 9
Editeur: IEEE
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» A Graphical Model Based on Performance Shaping Factors for Assessing Human Reliability
Résumé:
Human reliability assessment (HRA) is an aspect of risk analysis concerned with identifying, analyzing, and quantifying the causes, contributions, and occurrence of human failures. Applications of existing HRA methods are often domain-specific, and difficult to implement even for experts. Also, due to the lack of empirical data, managing uncertainty is important, if not essential. In view of such limitations, we propose a new and comprehensive HRA methodology acronymed “PRELUDE” (Performance shaping factor-based human REliability assessment using vaLUation-baseD systEms). It is a quantitative and qualitative HRA methodology, applied to railway operations. The qualitative part characterizes a safety critical situation using performance shaping factors (PSFs). The PSFs are identified from domain specific human factors and PSF-based studies. The quantitative proposition is a framework of a graphical model (Valuation-based System) and belief functions theory. Appropriate representation and handling of all types of uncertainties, and combination of conflicting expert opinions is considered in this framework. To aid in the choice of appropriate combination method, combined expert data are discussed and compared using quantitative metrics. PRELUDE allows quantifying a human failure event given an operational context. Sensitivity analysis is used to establish a priority ranking among the PSFs. Finally, application on a railway accident scenario describes usage and applicability of our proposition.
Auteurs: Subeer Rangra;Mohamed Sallak;Walter Schön;Frédéric Vanderhaegen;
Apparue dans: IEEE Transactions on Reliability
Date publication: 12.-2017, volume: 66, issue:4, pages: 1120 - 1143
Editeur: IEEE
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» A Hierarchical Split-Based Approach for Parametric Thresholding of SAR Images: Flood Inundation as a Test Case
Résumé:
Parametric thresholding algorithms applied to synthetic aperture radar (SAR) imagery typically require the estimation of two distribution functions, i.e., one representing the target class and one its background. They are eventually used for selecting the threshold that allows binarizing the image in an optimal way. In this context, one of the main difficulties in parameterizing these functions originates from the fact that the target class often represents only a small fraction of the image. Under such circumstances, the histogram of the image values is often not obviously bimodal and it becomes difficult, if not impossible, to accurately parameterize distribution functions. Here we introduce a hierarchical split-based approach that searches for tiles of variable size allowing the parameterization of the distributions of two classes. The method is integrated into a flood-mapping algorithm in order to evaluate its capacity for parameterizing distribution functions attributed to floodwater and changes caused by floods. We analyzed a data set acquired during a flood event along the Severn River (U.K.) in 2007. It is composed of moderate (ENVISAT-WS) and high (TerraSAR-X)-resolution SAR images. The obtained classification accuracies as well as the similarity of performance levels to a benchmark obtained with an established method based on the manual selection of tiles indicate the validity of the new method.
Auteurs: Marco Chini;Renaud Hostache;Laura Giustarini;Patrick Matgen;
Apparue dans: IEEE Transactions on Geoscience and Remote Sensing
Date publication: 12.-2017, volume: 55, issue:12, pages: 6975 - 6988
Editeur: IEEE
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» A High Precision Lumped Parameter Model for Piezoelectric Energy Harvesters
Résumé:
We present a high precision lumped parameter model for efficient prediction of the resonant frequencies and coupling of cantilevered piezoelectric energy harvesters in absence of tip mass. Correction factors for the existing lumped parameter model are derived by comparing with the highly accurate distributed parameter model of cantilevered harvesters. First, a correction factor is defined for uncoupled lumped parameter model to predict the natural frequencies. Finally, the coupled lumped parameter model is subjected to a unified correction factor to accurately predict both the resonant frequencies and electrical outputs. The unified correction factor is derived by unifying the frequency and amplitude correction factors. The calculated outputs are in good agreement with the experimental results available in the literature.
Auteurs: Srimanta Baishya;Debarun Borthakur;Richik Kashyap;Amitabh Chatterjee;
Apparue dans: IEEE Sensors Journal
Date publication: 12.-2017, volume: 17, issue:24, pages: 8350 - 8355
Editeur: IEEE
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» A High-Order Model for Fast Estimation of Electromagnetic Absorption Induced by Multiple Transmitters in Portable Devices
Résumé:
In the development of 5G communication systems, multiantenna transmitting architectures and millimeter-wave operating frequency bands are effective ways to improve the communication data rate. In order to estimate the electromagnetic exposure under multiantenna transmitters installed in portable devices working in long-term evolution (LTE) and millimeter-wave bands, this paper generalizes a low-order model to higher orders based on the Fourier series expansion for a fast and accurate evaluation and prediction of electromagnetic absorption (EA) as a function of the phase difference among multiple transmitters. Several numerical and experimental examples are given to demonstrate the effectiveness of the proposed high-order model in multiple LTE, 5G, and millimeter-wave communication bands. With the excellent capability of calculating and predicting EA with a low error, this high-order model can be used to improve the bio-electromagnetic performances of multiantenna portable devices when combined with other communication technologies.
Auteurs: Jian Li;Su Yan;Yanan Liu;Bertrand M. Hochwald;Jian-Ming Jin;
Apparue dans: IEEE Transactions on Antennas and Propagation
Date publication: 12.-2017, volume: 65, issue:12, pages: 6768 - 6778
Editeur: IEEE
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» A High-Power Orthogonal Over-Mode Circular Waveguide TE11-TM01 Mode Converter
Résumé:
A novel high-power orthogonal over-mode circular waveguide (CWG) TE11-TM01 mode converter is presented. This mode converter is made up by two orthogonal CWGs and two metal plates. One metal plate is used to achieve phase shift of two semicircular waveguide TE11 modes. In the bend, phase difference between the two TE11 modes is changed from $pi $ to $2pi $ , which meets the requirement of mode conversion at the end of the metal plate. The other metal plate is used to reflect and suppress CWG TE21 mode, and thus power-handling capacity is greatly improved because lager radius of CWG can be utilized. After optimizing basic parameters, simulation results show that the mode converter has virtues of high power-handling capacity, high conversion efficiency, and a very small bend radius. Finally, test result of the VSWR has a good agreement with simulation result and insertion loss is 0.12 dB at 8.4 GHz. All of that prove the feasibility of the mode converter.
Auteurs: Xiao-Meng Li;Jian-Qiong Zhang;Xiang-Qiang Li;Qing-Xiang Liu;
Apparue dans: IEEE Microwave and Wireless Components Letters
Date publication: 12.-2017, volume: 27, issue:12, pages: 1095 - 1097
Editeur: IEEE
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» A Hybrid Instruction Prefetching Mechanism for Ultra Low-Power Multicore Clusters
Résumé:
The instruction memory hierarchy plays a critical role in performance and energy efficiency of ultralow-power (ULP) processors for the Internet-of-Things (IoT) end-nodes. This is mainly due to the extremely tight power envelope and area budgets, which imply small instruction-caches (I-Cache) operating at very low supply voltages (near-threshold). The challenge is aggravated by the fact that multiple processors, fetching in parallel, require plenty of bandwidth from the I-Caches. In this letter, we propose a low-cost and energy efficient hybrid instruction-prefetching mechanism to be integrated with a ULP multicore cluster. We study its performance for a wide range of IoT applications, from cryptography to computer vision, and show that it can effectively improve the hit-rate of almost all of them to above 95% (average performance improvement of over $2 times $ ). In addition, we designed our prefetcher and integrated it in a 4-cores cluster in 28 nm fully-depleted silicon-on-insulator (FDSOI) technology. We show that system’s power consumption increases only by about 11% and silicon area by less than 1%. Altogether, a total energy reduction of $1.9times $ is achieved, thanks to more than $2 times $ performance improvement, enabling a significantly longer battery life.
Auteurs: Maryam Payami;Erfan Azarkhish;Igor Loi;Luca Benini;
Apparue dans: IEEE Embedded Systems Letters
Date publication: 12.-2017, volume: 9, issue:4, pages: 125 - 128
Editeur: IEEE
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» A Hybrid Solution for Simultaneous Transfer of Ultrastable Optical Frequency, RF Frequency, and UTC Time-Tags Over Optical Fiber
Résumé:
We describe a fiber-optic solution for simultaneous distribution of all signals generated at today’s most advanced time and frequency laboratories, i.e., an ultrastable optical reference frequency derived from an optical atomic clock, a radio frequency precisely linked to a realization of the SI-Second, and a realization of an atomic timescale, being the local representation of the virtual, global UTC timescale. In our solution both the phase of the optical carrier and the delay of electrical signals (10-MHz frequency reference and one-pulse-per-second time tags) are stabilized against environmental perturbations influencing the fiber link instability and accuracy. We experimentally demonstrate optical transfer stabilities of $5 times 10^{-19}$ and $2 times 10^{-15}$ for 100 s averaging period, for optical carrier and 10-MHz signals, respectively.
Auteurs: Przemysław Krehlik;Harald Schnatz;Łukasz Śliwczyński;
Apparue dans: IEEE Transactions on Ultrasonics, Ferroelectrics and Frequency Control
Date publication: 12.-2017, volume: 64, issue:12, pages: 1884 - 1890
Editeur: IEEE
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» A Hybrid Switched-Capacitor Battery Management IC With Embedded Diagnostics for Series-Stacked Li–Ion Arrays
Résumé:
This paper presents a small form factor dc–dc converter that can be used in a ladder architecture to provide state-of-charge equalization for large-scale lithium-ion arrays. A resonant switched-capacitor converter is implemented in a 180-nm bulk CMOS process that uses a merged-interleaving architecture to affect two-phase interleaving with only a single inductor. The approach has the advantage of reducing passive component volume for a given efficiency and voltage ripple constraint. A bidirectional current-mode control scheme is outlined that uses regulated zero-current switching and partial zero-voltage switching. The design also supports electrochemical diagnostic functions through a fully digital spectroscopic perturbation of cell current. Cell voltage and current are digitized through 10-b SAR analog to digital converters (ADCs), filtered and decimated for off-chip impedance extraction. The converter achieves 94.8% conversion efficiency in 1:1 balancing mode with a total board area less than 1 cm2, and supports bidirectional power transfer >3.7 W.
Auteurs: Christopher Schaef;Eric Din;Jason T. Stauth;
Apparue dans: IEEE Journal of Solid-State Circuits
Date publication: 12.-2017, volume: 52, issue:12, pages: 3142 - 3154
Editeur: IEEE
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» A Layered Model for AI Governance
Résumé:
AI-based systems are “black boxes,” resulting in massive information asymmetries between the developers of such systems and consumers and policymakers. In order to bridge this information gap, this article proposes a conceptual framework for thinking about governance for AI.
Auteurs: Urs Gasser;Virgilio A.F. Almeida;
Apparue dans: IEEE Internet Computing
Date publication: 12.-2017, volume: 21, issue:6, pages: 58 - 62
Editeur: IEEE
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» A Local-Optimization Emergency Scheduling Scheme With Self-Recovery for a Smart Grid
Résumé:
With the widespread applications of Internet of Things (IoT), the emergency response performance for large-scale network packets is facing serious challenge, especially for renewable distributed energy resources monitoring in a smart grid. Therefore, how to improve the real-time performance of the emergency data packets has been a critical issue. Traditional packet scheduling schemes and topology optimization strategies are not suitable for a large-scale IoT-based smart grid. To address this problem, this paper proposes a new packet scheduling scheme named LOES, which first combines the priority-based packet scheduling scheme with local optimization. We exchange local geographic information to reduce the hop counts and distance between distributed source nodes and sink nodes. Each destination node determines the packet scheduling sequence according to the received emergency information. Finally, we compare LOES with first come first serve, multilevel scheme, and dynamic multilevel priority packet scheduling scheme using packet loss rate, packet waiting time, and average packet end-to-end delay as metrics. The simulation results show that LOES outperforms these previous scheduling schemes.
Auteurs: Tie Qiu;Kaiyu Zheng;Houbing Song;Min Han;Burak Kantarci;
Apparue dans: IEEE Transactions on Industrial Informatics
Date publication: 12.-2017, volume: 13, issue:6, pages: 3195 - 3205
Editeur: IEEE
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» A Low Profile Antenna for Millimeter-Wave Body-Centric Applications
Résumé:
Millimeter-Wave (mm-Wave) frequencies are a front runner contender for the next generation body-centric wireless communications. In this paper, the design of a very low-profile antenna is presented for body-centric applications operating in the mm-Wave frequency band centered at 60 GHz. The antenna has an overall size of $14times 10.5times 1.15~text {mm}^{3}$ and is printed on a flexible printed circuit board. The performance of the antenna is evaluated in off-body, on-body, and body-to-body communication scenarios using a realistic numerical phantom and verified through measurements. The antenna has a bandwidth of 9.8 GHz and offers a gain of 10.6 dBi in off-body (free space) configuration, while 12.1 dBi in on-body configuration. It also achieves an efficiency of 74% in off-body and 63% in on-body scenario. The small and flexible structure of the antenna along with excellent impedance matching, broad bandwidth, high gain, and good efficiency makes it a suitable candidate to attain simultaneous data transmission/reception at mm-Wave frequencies for the 5G body-centric applications.
Auteurs: Masood Ur-Rehman;Nabeel Ahmed Malik;Xiaodong Yang;Qammer Hussain Abbasi;Zhiya Zhang;Nan Zhao;
Apparue dans: IEEE Transactions on Antennas and Propagation
Date publication: 12.-2017, volume: 65, issue:12, pages: 6329 - 6337
Editeur: IEEE
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» A Low-Power Ring Oscillator Using Pull-Up Control Scheme Integrated by Metal–Oxide TFTs
Résumé:
This paper proposes a pull-up control scheme in the pseudo-CMOS inverter to design a low-power ring oscillator (RO) realized by only n-type transistors. For comparing 11-stages, the proposed RO and the conventional RO are both fabricated by metal–oxide thin-film transistors with the etch stop layer structure. It is measured that the power-delay product of the proposed RO is reduced by more than 50% under the same value of supply voltage. At the same oscillation frequency, the power consumption tends to be reduced by 18% as oscillation frequency increases. Furthermore, the peak-to-peak voltage of the proposed RO can almost receive a full swing at any supply voltage.
Auteurs: Jian-Dong Wu;Fan Zhan;Lei Zhou;Wei-Jing Wu;Miao Xu;Lei Wang;Ruo-He Yao;Jun-Biao Peng;Mansun Chan;
Apparue dans: IEEE Transactions on Electron Devices
Date publication: 12.-2017, volume: 64, issue:12, pages: 4946 - 4951
Editeur: IEEE
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» A Low-Profile Broadband 32-Slot Continuous Transverse Stub Array for Backhaul Applications in $E$ -Band
Résumé:
A high-gain, broadband, and low-profile continuous transverse stub antenna array is presented in E-band. This array comprises 32 long slots excited in parallel by a uniform corporate parallel-plate-waveguide beamforming network combined to a pillbox coupler. The radiating slots and the corporate feed network are built in aluminum whereas the pillbox coupler and its focal source are fabricated in printed circuit board technology. Specific transitions have been designed to combine both fabrication technologies. The design, fabrication, and measurement results are detailed, and a simple design methodology is proposed. The antenna is well matched ( $S_{11} < -13.6$ dB) between 71 and 86 GHz, and an excellent agreement is found between simulations and measurements, thus validating the proposed design. The antenna gain is higher than 29.3 dBi over the entire bandwidth, with a peak gain of 30.8 dBi at 82.25 GHz, and a beam having roughly the same half-power beamwidth in E- and H-planes. This antenna architecture is considered as an innovative solution for long-distance millimeter-waves telecommunication applications such as fifth-generation backhauling in E-band.
Auteurs: Thomas Potelon;Mauro Ettorre;Laurent Le Coq;Terry Bateman;Jim Francey;Delphine Lelaidier;Eric Seguenot;Frédéric Devillers;Ronan Sauleau;
Apparue dans: IEEE Transactions on Antennas and Propagation
Date publication: 12.-2017, volume: 65, issue:12, pages: 6307 - 6316
Editeur: IEEE
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» A Magnetoelectric Dipole Leaky-Wave Antenna for Millimeter-Wave Application
Résumé:
This paper presents a novel frequency beam scanning slotted leaky-wave magnetoelectric (ME) dipole antenna array for the fifth generation (5G) application. The proposed antenna, which has eighteen elements of slots and electric dipoles, is built on a two-layer printed circuit board. In the lower layer, it is a conventional slotted substrate integrated waveguide (SIW) leaky-wave antenna (LWA). In the upper layer, electric dipoles are attached to the design. As for each element unit, the magnetic dipole is realized by each lower-layer aperture, while the electric dipole is realized by each pair of patches in the upper layer. The design concept is that two modes are excited together in orthogonal directions to realize the ME dipole. By introducing electric dipoles to the conventional slotted LWA, the antenna exhibits less gain variation over a wide bandwidth. The SIW leaky-wave ME dipole antenna array is designed and fabricated to operate at the 28-GHz band. It operates with wide impedance bandwidth and a peak gain of 16.55 dBi with less than 3-dB gain variation throughout the frequency range from 27 to 32 GHz.
Auteurs: Ka-Ming Mak;Kwok-Kan So;Hau-Wah Lai;Kwai-Man Luk;
Apparue dans: IEEE Transactions on Antennas and Propagation
Date publication: 12.-2017, volume: 65, issue:12, pages: 6395 - 6402
Editeur: IEEE
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» A Major Player: Renewables Are Now Mainstream [Guest Editorial]
Résumé:
The Utility Variable-Generation Integration Group (UVIG) has focused on the integration of wind, and more recently solar, power into electric power systems. The industry focus is now concentrating around how to integrate inverter-based power plants into weak grids and, indeed, how to design a grid for 100% nonsynchronous generation. The focus is no longer on how to integrate those alien forms of generation from Mars into the grid but how to integrate the energy systems of the future, of which renewable energy systems are a major part, into a coherent whole. Examines how this will likely develop over the coming years.
Auteurs: J. Charles Smith;
Apparue dans: IEEE Power and Energy Magazine
Date publication: 12.-2017, volume: 15, issue:6, pages: 16 - 21
Editeur: IEEE
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» A Method for Measuring the Directional Response of Ultrasound Receivers in the Range 0.3–80 MHz Using a Laser-Generated Ultrasound Source
Résumé:
A simple method for measuring the directivity of an ultrasound receiver is described. The method makes use of a custom-designed laser ultrasound source which generates a large diameter (>1 cm) broadband monopolar plane wave with a continuous frequency content extending from $le 330~{mathrm {kHz}}$ to $approx 80~{mathrm {MHz}}$ . The plane wave is highly uniform in amplitude (±5% over >8 mm) and phase (equivalent to $< lambda/7 $ at 80 MHz over $ge 11~{mathrm {mm}}$ ). To measure directivity, the source is rotated around the receiver under test in a compact centimeter-scale setup. To demonstrate the method, it was used to measure the directivity of two broadband small aperture Fabry-Perot ultrasound sensors over an angular range of ±50° at frequencies up to 80 MHz. Measurements were found to be highly repeatable with an estimated typical repeatability <4% in the range of 0.5–25 MHz. Due to the broad bandwidth, large size, and adjustable nature of the source, the method is widely applicable and could aid the characterization of receivers used in medical ultrasound, ultrasonic nondestructive testing. and ultrasound metrology.
Auteurs: James A. Guggenheim;Edward Z. Zhang;Paul C. Beard;
Apparue dans: IEEE Transactions on Ultrasonics, Ferroelectrics and Frequency Control
Date publication: 12.-2017, volume: 64, issue:12, pages: 1857 - 1863
Editeur: IEEE
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» A Method for Removal of Deep Brain Stimulation Artifact From Local Field Potentials
Résumé:
This paper presents a signal processing method for the electrophysiology simultaneously recorded during deep brain stimulation (DBS) as a research tool. Regarding the local field potential (LFP) signals recorded during stimulation, a novel method was proposed for removal of stimulation artifacts caused by the much stronger stimulating pulse compared to typical LFP. This artifact suppression method was tested and evaluated in an in vitro situation. The results indicate that the stimulation artifacts are well suppressed by this method. Secondly, this method was tested in vivo in Parkinson’s disease (PD) patients. It was used to process the LFP signals recorded intraoperatively from PD patients to preliminarily explore the quantitative dependencies of beta band synchronization variations in the subthalamic nucleus (STNs) on the applied DBS parameters, including stimulation voltage, frequency and pulse width. The results confirm that DBS therapy can suppress excessive beta frequency activity and that the degree of attenuation increases with increasing DBS voltage within a range of 1–3 V and increasing DBS frequency within a range of 60–120 Hz. The proposed artifact suppression method provides technical support for exploring the direct effect of electrical stimulation on the brain activities.
Auteurs: Xing Qian;Yue Chen;Yuan Feng;Bozhi Ma;Hongwei Hao;Luming Li;
Apparue dans: IEEE Transactions on Neural Systems and Rehabilitation Engineering
Date publication: 12.-2017, volume: 25, issue:12, pages: 2217 - 2226
Editeur: IEEE
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» A Millimeter-Wave Dual-Feed Square Loop Antenna for 5G Communications
Résumé:
A millimeter-wave (mm-Wave) dual-feed square loop antenna is presented in this paper for 5G communications. It synthesizes identical far-field radiation patterns as a conventional single-feed square loop antenna. The dual-feed antenna (DFA) also simplifies or even eliminates the lossy power-combining network between the transmitter and antenna, achieving direct on-antenna power combining. The proposed antenna concept significantly improves the total radiated power and power efficiency of a wireless transmitter, particularly useful for 5G transmitters that normally require large output power to compensate the high mm-Wave path loss. Compared with antenna-array-based spatial power combining, the DFA only requires a single-antenna footprint and maintains the single-element beamwidth, ideal for mobile 5G communications. The dual-feed square loop antenna is designed and characterized at two potential 5G bands, i.e., 38.5 and 73.5 GHz. Conventional single-feed square loop antennas are implemented as reference designs. Closely matched antenna characteristics are achieved in measurement between the proposed DFA and conventional single-feed antenna. The dual-feed square loop antenna has measured broadside gain of 2.9 and 3 dBi, and fractional bandwidth of 13% and 14%, at 38.5 and 73.5 GHz, respectively. High-speed modulation test is also performed. A 4.3% error vector magnitude (EVM) with a −33.2-dBc adjacent channel leakage ratio (ACLR) for 6-Gb/s 64QAM is achieved at 38.5 GHz, and a 5.6% EVM with a −33.4-dBc ACLR for 6-Gb/s 64QAM is measured at 73.5 GHz, which demonstrates the viability of the proposed DFA for high-speed and complex modulations required by 5G communications.
Auteurs: Sensen Li;Taiyun Chi;Yanjie Wang;Hua Wang;
Apparue dans: IEEE Transactions on Antennas and Propagation
Date publication: 12.-2017, volume: 65, issue:12, pages: 6317 - 6328
Editeur: IEEE
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» A Millimeter-Wave Non-Magnetic Passive SOI CMOS Circulator Based on Spatio-Temporal Conductivity Modulation
Résumé:
Linear, time-invariant, passive circuits and systems constructed from conventional materials with symmetric permittivity and permeability tensors are reciprocal. Breaking Lorentz reciprocity enables the implementation of non-reciprocal components, such as gyrators, isolators, and circulators, which find application in numerous wireless communication systems. Non-reciprocal components are traditionally implemented using ferrite materials, which exhibit the Faraday effect under the application of an external magnetic field bias. However, ferrite materials cannot be integrated into CMOS fabrication processes and require an external biasing magnet, and hence are bulky and expensive. Recently, there has been significant research interest in the implementation of non-magnetic non-reciprocal components using temporal modulation, including a fully integrated 25-GHz circulator in a 45-nm SOI CMOS, demonstrating magnetic-free passive non-reciprocity on silicon at millimeter waves for the first time. This paper presents a detailed analysis of the millimeter-wave circulator in both time and frequency domains. Millimeter-wave non-reciprocal operation is enabled by the concept of spatio-temporal conductivity modulation, which achieves broadband non-reciprocal gyrator functionality over theoretically infinite bandwidth (BW). When compared with prior approaches based on N-path filters, spatio-temporal conductivity modulation requires only four-phase 50% duty-cycle clocking at frequencies significantly lower than the operation frequency, enabling scaling to millimeter waves. The 25-GHz circulator achieves minimum transmitter (TX)-to-antenna (ANT)/ANT-to-receiver (RX) insertion losses of 3.3 dB/3.2 dB, respectively, with a 1-dB BW of 4.6 GHz. TX-to-RX isolation is 18.3–21.2 dB (limited by the measurement setup) over the same BW. The circulator IC occupies an area of 1.2 mm $times $ 1.8 mm ( $lambda /8 times lambda $ /6). The spatio-temporal conductivity modulation concept is readily scalable across frequency and can be an enabler for higher millimeter-wave (e.g., 77 GHz) circulators as well as optical isolators.
Auteurs: Tolga Dinc;Aravind Nagulu;Harish Krishnaswamy;
Apparue dans: IEEE Journal of Solid-State Circuits
Date publication: 12.-2017, volume: 52, issue:12, pages: 3276 - 3292
Editeur: IEEE
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» A Miniaturized Wideband Three-Section Branch-Line Hybrid With Harmonic Suppression Using Coupled Line and Open-Ended Stubs
Résumé:
In this letter, a wideband three-section branch-line hybrid with harmonic suppression is designed using a novel transmission line model. The proposed topology is constructed using a coupled line, two series transmission lines, and open-ended stubs. The required design equations are obtained by applying even- and odd-mode analysis. To support these equations, a three-section branch-line hybrid working at 0.9 GHz is fabricated and tested. The physical area of the prototype is reduced by 87.7% of the conventional hybrid and the fractional bandwidth is greater than 52%. In addition, the proposed technique can eliminate second harmonic by a level better than 15 dB.
Auteurs: Rusan Kumar Barik;Rathod Rajender;Sholampettai Subramanian Karthikeyan;
Apparue dans: IEEE Microwave and Wireless Components Letters
Date publication: 12.-2017, volume: 27, issue:12, pages: 1059 - 1061
Editeur: IEEE
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» A Mixed-Initiative Haptic Teleoperation Strategy for Mobile Robotic Systems Based on Bidirectional Computational Trust Analysis
Résumé:
The goal of this paper is to improve the performance of joint human–robot systems while balancing human experience through computational trust analysis in telerobotics applications. A mixed-initiative approach is enabled by scaling the manual and autonomous controls using a function of computational human-to-robot trust. A dynamic haptic force feedback scaling strategy is performed via a function of computational robot-to-human trust to adjust the assistive force and, hence, physical workload of the operator. Passivity-based methods are used to guarantee the stability of the overall framework. Moreover, guidelines are provided to adjust the transparency of force feedback and velocity signals while guaranteeing passivity. An experimental study with 30 human subjects demonstrates a 12.8% increase in task performance and a 10.7% decrease in operator workload when the proposed strategy is used as compared to a manual autonomy allocation approach. The results also indicate that the proposed method yields higher operator satisfaction compared to manual and optimal autonomy allocation methods and is 10.1% more trusted by the operators than the optimal allocation method.
Auteurs: Hamed Saeidi;John R. Wagner;Yue Wang;
Apparue dans: IEEE Transactions on Robotics
Date publication: 12.-2017, volume: 33, issue:6, pages: 1500 - 1507
Editeur: IEEE
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» A Model Checking Approach to Testing the Reliability of Smart Grid Protection Systems
Résumé:
As distributed, communication-based protection systems become more prevalent in the emerging smart grid, the task of critically assessing their reliability has become increasingly challenging due to the complexity of their underlying software designs. This paper demonstrates that the discipline of software model checking can be applied to smart grid protection software designs to rigorously assess their fault tolerance. In this paper, the SPIN model checker is applied to a published wide-area backup protection system (WABPS). The WABPS was specifically architected to be highly reliable under various kinds of common failure scenarios, including mechanical malfunctions, erroneous sensor readings, and communication failures. However, because of its built-in redundancy and decentralized peer-to-peer design, calculating its precise fault tolerance is nontrivial. This paper shows how SPIN can be applied to the WABPS's design to brute-force prove the limits of the number and types of failures that can occur while the system remains able to successfully perform its function. This same technique is applicable to a wide variety of smart grid protection software designs, and the information it provides is invaluable to protection engineers during the development of new systems, for assessing the quality of competing designs, and for risk management purposes.
Auteurs: Seth T. Hamman;Kenneth M. Hopkinson;Jose E. Fadul;
Apparue dans: IEEE Transactions on Power Delivery
Date publication: 12.-2017, volume: 32, issue:6, pages: 2408 - 2415
Editeur: IEEE
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» A Model-Based Diagnosis System for a Traction Power Supply System
Résumé:
The high-speed, heavy-load, high-traffic density of railway demands the high reliability of a traction power supply system (TPSS). To achieve this, a diagnosis system is essential. This paper presents a reliable, general, and easy-to-maintain diagnosis system, based on the system model with the purpose of online fault detection, location, and recognition of the TPSS. Two kinds of model-based diagnosis (MBD) are combined to achieve high diagnosis efficiency and recognition ability of fault types. The model library and diagnosis engine are the two main parts of the diagnosis system, both of which have the two-level structure that contains a consistency-based level and an abductive level. In the consistency-based level, the model and diagnosis engine of consistency-based MBD are established, which contribute to the fault detection and diagnosis candidate generation. The minimal support environment offline searching algorithm and binary particle swarm optimization with a genetic algorithm are proposed to enhance the consistency-based reasoning. In the abductive level, the model and diagnosis engine of abductive MBD are utilized to locate the faults and recognize the fault types. With the diagnosis candidates, the abductive reasoning efficiency can be dramatically improved. In addition, to improve the fault location and recognition performance, the Bayes theorem is utilized in the abductive reasoning. As the system relies on the sensor information, a fault-tolerant strategy for fault reasoning is proposed to enhance the diagnosis system reliability. Finally, three cases are presented to illustrate the effectiveness and efficiency of this system.
Auteurs: Zhigang Liu;Keting Hu;
Apparue dans: IEEE Transactions on Industrial Informatics
Date publication: 12.-2017, volume: 13, issue:6, pages: 2834 - 2843
Editeur: IEEE
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» A Modified Three-Step Algorithm for TOPS and Sliding Spotlight SAR Data Processing
Résumé:
There are two challenges for efficient processing of both the sliding spotlight and terrain observation by progressive scans (TOPS) data using full-aperture algorithms. First, to overcome the Doppler spectrum aliasing, zero-padding is required for azimuth up sampling, increasing the computation burden; second, the azimuth deramp operation for avoiding synthetic aperture radar (SAR) image folding leads to azimuth time shift along the range dimension, and in turn the appearance of ghost targets and azimuth resolution reduction at the scene edge, especially in the wide-swath case. In this paper, a novel three-step algorithm is proposed for processing the sliding spotlight and TOPS data. In the first step, a modified derotation is derived in detail based on the chirp z-transform (CZT), avoiding zero-padding; then, the chirp scaling algorithm kernel is adopted for precise focusing in the second step; and in the third step, instead of the traditional range-independent deramp, a range-dependent deramp is applied to compensate for the time shift. Moreover, the SAR image geometry distortion caused by range-dependent deramp is corrected by employing a range-dependent CZT. Experimental results based on both simulated data and real data are provided to validate the proposed algorithm.
Auteurs: Wei Yang;Jie Chen;Wei Liu;Pengbo Wang;Chunsheng Li;
Apparue dans: IEEE Transactions on Geoscience and Remote Sensing
Date publication: 12.-2017, volume: 55, issue:12, pages: 6910 - 6921
Editeur: IEEE
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» A Modular Active Front-End Rectifier With Electronic Phase Shifting for Harmonic Mitigation in Motor Drive Applications
Résumé:
In this paper, an electronic phase-shifting strategy has been optimized for a multiparallel configuration of line-commutated rectifiers with a common dc-bus voltage used in motor drive application. This feature makes the performance of the system independent of the load profile and maximizes its harmonic reduction ability. In order to further reduce the generated low-order harmonics, a dc-link current modulation scheme and its phase-shift values of multidrive systems have been optimized. Analysis, simulations, and experiments have been carried out to verify the proposed method.
Auteurs: Firuz Zare;Pooya Davari;Frede Blaabjerg;
Apparue dans: IEEE Transactions on Industry Applications
Date publication: 12.-2017, volume: 53, issue:6, pages: 5440 - 5450
Editeur: IEEE
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» A Multiphase Class-D Automotive Audio Amplifier With Integrated Low-Latency ADCs for Digitized Feedback After the Output Filter
Résumé:
A $5 times 80$ W class-D audio power amplifier for automotive applications is presented. The amplifier is implemented in a 140-nm bipolar CMOS DMOS SOI. Configurable digital-loop filters can compensate for a range of LC output filters and their high loop gain (>50 dB between 20 Hz and 20 kHz) suppresses non-idealities of the output filter and enables low-cost output filter components. Key elements are the integrated low-latency $Delta Sigma$ analog to digital converters (ADCs) which digitize the output signals directly at the speaker load, after the output filter. The ADCs use filtering finite impulse response digital to analog converters in their feedback path to create an input–output transfer with a negative group delay at low frequencies. The ADCs have 116-dBA DR and −108 dB total harmonic distortion (THD). The bridge-tied load amplifier supports multiphase pulse-width modulation for lower electromagnetic interference. It operates with supplies from 6 to 25 V and with loads down to $1Omega$ and achieves 19- $mu text{V}$ idle noise (Awtd) and 0.004% THD + N.
Auteurs: Daniel Schinkel;Wouter Groothedde;Fred Mostert;Marto-Jan Koerts;Eric van Iersel;Daniel Groeneveld;Lucien Breems;
Apparue dans: IEEE Journal of Solid-State Circuits
Date publication: 12.-2017, volume: 52, issue:12, pages: 3181 - 3193
Editeur: IEEE
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» A Multiple-Ring-Modulated JTE Technique for 4H-SiC Power Device With Improved JTE-Dose Window
Résumé:
In this paper, a multiple-ring-modulated junction termination extension (MRM-JTE) technology for large-area silicon carbide PiN rectifier rated at 4500 V is proposed and experimentally investigated using a standard two-zone JTE (TZ-JTE) process without extra process steps or masks. Multiple modulation rings embedded inside JTE region, which is similar to varied lateral doping technology widely used in silicon devices, form a gradual decrease of effective charges in the termination region. MRM combines the advantages of two termination techniques, namely, ring-assisted JTE and space-modulated JTE, to enlarge the optimum JTE-dose window with high reverse blocking voltage in comparison with conventional TZ-JTE. A breakdown voltage of 4940 V at a leakage current of $1~mu text{A}$ is achieved from fabricated MRM-JTE rectifiers with a 36- $mu text{m}$ -thick N epilayer doped to ${1.8} times {10}^{{15}}$ cm−3, which is 92% of the ideal parallel-plane value. A forward current of 50 A has been measured at a forward voltage drop of 3.9 V for devices with an active anode area of 9.2 mm2, corresponding to low differential on-resistance of 1.8 $text{m}Omega cdot text {cm}^{ {2}}$ . The simulation and experimental results show that the proposed device exhibits approximately 2 times JTE dose tolerance window improvement with respect to the breakdown voltage of 4500 V.
Auteurs: Xiaochuan Deng;Lijun Li;Jia Wu;Chengzhan Li;Wanjun Chen;Juntao Li;Zhaoji Li;Bo Zhang;
Apparue dans: IEEE Transactions on Electron Devices
Date publication: 12.-2017, volume: 64, issue:12, pages: 5042 - 5047
Editeur: IEEE
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» A Neural Network-Based Dynamic Cost Function for the Implementation of a Predictive Current Controller
Résumé:
Predictive current controllers based on finite control set-model predictive control (FCS-MPC) have been extensively used in power converters. One of the clear advantages of FCS-MPC is that several control targets and constraints can be included in a cost function and simultaneously controlled. In order to establish the importance of one controlled target in relation to the others, weighting factors are used. Once the weighting factors have been tuned, they remain unchanged. This paper presents a neural network-based novel approach to the problem, in which weighting factors are tuned online as a function of several merit figures and references. This adaptive method updates online the weighting factors in the cost function when either the merit figures or the references change to boost the performance of the controller. This strategy is validated through simulations and experiments are carried out on a three-level neutral point clamped converter. The results are compared with the conventional FCS-MPC, which is based on static cost functions.
Auteurs: Osmell Machado;Pedro Martín;Francisco J. Rodríguez;Emilio J. Bueno;
Apparue dans: IEEE Transactions on Industrial Informatics
Date publication: 12.-2017, volume: 13, issue:6, pages: 2946 - 2955
Editeur: IEEE
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» A New Adaptive Impedance-Based LOE Protection of Synchronous Generator in the Presence of STATCOM
Résumé:
This paper presents a new adaptive distance function for loss of excitation (LOE) protection of synchronous generator in the presence of STATCOM. Nowadays, the Berdy distance function is most widely utilized as the main protection for LOE fault. However, the presence of FACTS devices has adverse impacts on the operation of this function. FACTS devices cause LOE protection function to underreach. Also, these devices cause a substantial delay on the performance of the distance LOE function. Consequently, due to the operational characteristic of the LOE distance protection function, a new adaptive method is proposed to remove STATCOM effects. The proposed scheme compensates theses undesirable effects on calculated apparent impedance by unsynchronized measurements at STATCOM terminals. In this method only, the Thevenin model parameters at STATCOM terminals are required to send the relay location via communication channel. The simulation results demonstrate that the proposed modified method enhances speed, security, and sensitivity of the LOE distance function when STATCOM is in service.
Auteurs: Hamid Yaghobi;
Apparue dans: IEEE Transactions on Power Delivery
Date publication: 12.-2017, volume: 32, issue:6, pages: 2489 - 2499
Editeur: IEEE
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» A New Aggregation Method-Based Error Analysis for Decision-Theoretic Rough Sets and Its Application in Hesitant Fuzzy Information Systems
Résumé:
Decision-theoretic rough sets (DTRSs) capture the decision semantics and can deduce three-way decisions with respect to the minimum expected risk. Considering the new evaluation format of hesitant fuzzy sets, we extend the range of applications of DTRSs to hesitant fuzzy information systems. In this case, the integrated approach by considering the interaction between information systems and loss functions becomes one of challenges. Different from the results reported in most of the existing papers, we combine the hesitant fuzzy information system and loss functions together via error analysis. In the hesitant fuzzy information system, a new binary relation is first defined by utilizing the normalization of hesitant fuzzy elements and the distance function. Then, the calculations of the similarity class and the conditional probability are discussed. With the aid of the error analysis method, we effectively aggregate the loss functions presented in the similarity class and determine the expected losses in the format of the intervals. Based on the possibility degree, we further explore the decision rules by comparing the expected losses. With the above analysis, we design a decision-making procedure of three-way decisions in a hesitant fuzzy information system. Finally, we elaborate the application of three-way decisions in hesitant fuzzy information systems by an example of the security evaluation of peer-to-peer lending platforms and validate our methods.
Auteurs: Decui Liang;Zeshui Xu;Dun Liu;
Apparue dans: IEEE Transactions on Fuzzy Systems
Date publication: 12.-2017, volume: 25, issue:6, pages: 1685 - 1697
Editeur: IEEE
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» A New DFT-Based Phasor Estimation Algorithm Using High-Frequency Modulation
Résumé:
This paper proposes a new fast algorithm to estimate the fundamental phasor of fault current signals, based on discrete Fourier transform (DFT). Since fault currents include decaying dc component (ddc), DFT-based algorithms have inaccuracy in phasor estimation. The proposed algorithm consists of four steps. First, a new auxiliary signal is introduced based on a simple high-frequency modulation of the fault current. Then, DFT of the fault current and sample-summation of both fault current and auxiliary signal are calculated, for each one-cycle-length data stream. Next, DFT estimation error due to the ddc is calculated. Finally, by removing this error, accurate fundamental phasor is obtained. This paper uses an innovative and accurate formulation based on notations of signal processing literature. To validate the proposed algorithm, several computer-simulated signals and an electromagnetic transient program-generated signal are employed. The proposed algorithm is compared with recent phasor estimation methods, using wide variety of test signals. Standard indices of rise time, settling time, and percentage overshoot are used for comparison. These comparisons show that the proposed algorithm has robust performance in off-nominal frequency condition, and presence of harmonics, noise and multiple ddc components. Moreover, it provides faster convergence speed and lower computation burden.
Auteurs: Babak Jafarpisheh;Seyed M. Madani;S. Mohammad Shahrtash;
Apparue dans: IEEE Transactions on Power Delivery
Date publication: 12.-2017, volume: 32, issue:6, pages: 2416 - 2423
Editeur: IEEE
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» A New Disturbance Attenuation Control Scheme for Quadrotor Unmanned Aerial Vehicles
Résumé:
This paper addresses a difficult problem of high-accuracy control for quadrotor unmanned aerial vehicles (UAVs) subject to external disturbance force and unknown disturbance torque. An observer-based full control scheme is presented. In the strategy, two observer-based estimators are first designed to estimate external disturbance force and torque, respectively. With the application of the precise estimation value, a nonlinear tracking controller is then proposed with compensated disturbance. It is shown by the Lyapunov stability analysis that the entire controller–observer system is asymptotically stable. The key feature of the scheme is that it not only has the superior capability to attenuate unknown external disturbance torque and external force generated by the wind, but also it is able to achieve full control (i.e., six degrees-of-freedom) of the quadrotor UAVs with position and attitude successfully controlled. The effectiveness of the approach is verified on a quadrotor UAV example.
Auteurs: Bing Xiao;Shen Yin;
Apparue dans: IEEE Transactions on Industrial Informatics
Date publication: 12.-2017, volume: 13, issue:6, pages: 2922 - 2932
Editeur: IEEE
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» A New Fault-Location Algorithm for Series-Compensated Double-Circuit Transmission Lines Based on the Distributed Parameter Model
Résumé:
A new two-terminal fault-location algorithm for series-compensated double-circuit transmission lines based on the distributed parameter line model is proposed. The system is considered as fully transposed, and a six-sequence component network is introduced to decouple the mutual electromagnetic effects between circuits. Two subroutines designated for the fault that occurs on the left or right side of the series compensator are developed. In each subroutine, the voltage of the series-compensated device is eliminated based on the fact that the sequence voltages calculated from two sides are equal at the fault point. The fault-location function is constructed by utilizing the feature in which the transition resistance is purely resistant at the fault point. The proposed algorithm does not rely on the equivalent model of a series-compensated device. Moreover, it does not require the fault type to be known, and there are no fault-location identification and pseudoroot elimination problems. PSCAD is employed to generate numerous fault cases in diverse conditions and the high accuracy of the proposed fault-location algorithm is validated in MATLAB.
Auteurs: Ying Zhang;Jun Liang;Zhihao Yun;Xiaoming Dong;
Apparue dans: IEEE Transactions on Power Delivery
Date publication: 12.-2017, volume: 32, issue:6, pages: 2398 - 2407
Editeur: IEEE
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» A New Field Test Method for Determining Energy Efficiency of Induction Motor
Résumé:
Electric motors and the drive systems approximately consume half of the global electricity consumption. In the European Union (EU), electric motors and the drive systems are estimated to account for about 70% of all industrial electricity consumption. Therefore, mandatory applications accrue from the legislation of governments or unions like the EU for customs and market surveillance or eco-design requirements. The mandatory applications and the global market size find out the necessity of efficiency measurement. There are several compliance and precompliance efficiency test methods in the literature. The compliance tests should execute reliable, accurate, and reproducible results. The purpose of this paper is to define a simple field method that will be used for measuring and determining in-service efficiency at industrial conditions. The proposed method in this paper is an inexpensive and easy method that would help to energy managers and engineers to make correct decision in replacing inefficient motors with efficient and new ones. In this paper, a novel induction motor-efficiency model function has been proposed based on the International Electrotechnical Commission 60034-2-1 standard equations, and a new field test procedure has been used in efficiency estimation. The new efficiency model function variables and constants are determined from the regression analysis, which depends on 86 tests of 437 different load points’ efficiency data. Furthermore, the proposed field test procedure, equations, and compliance test methods are tested on a sample motor in laboratory, and the results are compared to each other.
Auteurs: Güvenir Kaan Esen;Engin Özdemir;
Apparue dans: IEEE Transactions on Instrumentation and Measurement
Date publication: 12.-2017, volume: 66, issue:12, pages: 3170 - 3179
Editeur: IEEE
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» A New Fuzzy Set and Nonkernel SVM Approach for Mislabeled Binary Classification With Applications
Résumé:
This paper proposes a new approach based on the kernel-free quadratic surface support vector machine model to handle a binary classification problem with mislabeled information. Unlike the traditional fuzzy and robust support vector machine models that reduce the weights of suspectable mislabeled points or even discard them, our new method first adopts the intuitionistic fuzzy set method to detect those suspectable mislabeled points, then deletes their labels, and indiscriminately utilizes their full position information to build a semisupervised model. In this way, we can not only eliminate the negative effect of mislabeled information but also avoid the difficult task of searching proper kernel functions in classical SVM models. Besides, to improve the efficiency and accuracy, a branch-and-bound algorithm is designed to accelerate the solving process. After that, we conduct some numerical tests with both artificial and real-world datasets to verify the superior performance of our proposed method among several benchmark methods. Furthermore, the proposed method is applied to brain–computer interface and credit risk assessment. The promising results strongly demonstrate the effectiveness of our method and show its big potential in some real applications.
Auteurs: Ye Tian;Miao Sun;Zhibin Deng;Jian Luo;Yueqing Li;
Apparue dans: IEEE Transactions on Fuzzy Systems
Date publication: 12.-2017, volume: 25, issue:6, pages: 1536 - 1545
Editeur: IEEE
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» A New Method to Test the Efficiency of Cochlear Implant Artifacts Removal From Auditory Evoked Potentials
Résumé:
Auditory evoked potentials are of great interest to objectively evaluate the audition in cochlear implant (CI) recipients. However, these measures are impeded by CI stimulation electrical artifacts present in the EEG. In the first part, this paper investigates the use of a hybrid model approximating CI patient data. This model gives access to both uncontaminated and denoised data, thus allowing for the evaluation of CI artifact removal methods. Here the efficiency of independent component analysis (ICA) is evaluated in the context of auditory steady-state responses (ASSRs). A dedicated experimental setup was developed to simultaneously record EEG data from a normal hearing (NH) participant and CI artifact data from a phantom equipped with a CI. Hybrid data were obtained as a linear mixture of both sources. Amplitude-modulated continuous tones were used as stimuli to elicit ASSRs. After denoising, the comparison of denoised hybrid data and original NH data showed high correlations between the two datasets, demonstrating the efficiency of ICA. In the second part, the ICA was applied to real clinical CI ASSR data. Results support the usefulness of the methodology as regards the performance evaluation of signal processing methods applied to CI patient data prior to clinical application.
Auteurs: Virginie Attina;Faten Mina;Pierre Stahl;Yvan Duroc;Evelyne Veuillet;Eric Truy;Hung Thai-Van;
Apparue dans: IEEE Transactions on Neural Systems and Rehabilitation Engineering
Date publication: 12.-2017, volume: 25, issue:12, pages: 2453 - 2460
Editeur: IEEE
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» A New Nonlinear Analytical Model of the SRM With Included Multiphase Coupling
Résumé:
Normal operation of switched reluctance motor (SRM) includes periods of simultaneous conduction of more than one phase. During these periods, currents of consecutive phases overlap, thereby producing mutual coupling between them that affects motor performance. For accurate performance prediction it is necessary to take mutual coupling into account. This is done through the new nonlinear analytical model presented in this paper. It can be used for fast design and optimization of any SRM configuration and with different converter topologies and control algorithms. Starting from the simple nonlinear model, based on single phase considerations, a new model comprising multiphase excitation is introduced. The model development is illustrated through the examples of 6/4 and 8/6 SRM. Using developed model, main motor characteristics are obtained and then compared to the simple model in order to envisage the differences. The new model is then validated through finite element method simulations. Additionally, experimental verification is provided for 6/4 SRM.
Auteurs: Dragan S. Mihic;Mladen V. Terzic;Slobodan N. Vukosavic;
Apparue dans: IEEE Transactions on Energy Conversion
Date publication: 12.-2017, volume: 32, issue:4, pages: 1322 - 1334
Editeur: IEEE
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» A New Nonlinear Chirp Scaling Algorithm for High-Squint High-Resolution SAR Imaging
Résumé:
Among high-squint high-resolution (HSHR) synthetic aperture radar imaging algorithms, nonlinear chirp scaling algorithm (NLCSA) and its extensions, such as extended NLCSA (ENLCSA), have a common drawback in that they all neglect the spatial variations of linear range migration (LRM) and Doppler centroid, and thus, only targets in a specific central slant range plane can be strictly focused. In this letter, we show that by using a new NLCSA, targets can be focused in the ground plane under HSHR conditions. Based on a more accurate 2-D spectrum, the new NLCSA outperforms the ENLCSA by introducing a new range–Doppler domain interpolation to correct residual range migration and a new perturbation function to remove the dependence of Doppler phase on azimuth. The coefficients of the new perturbation function are numerically calculated and then smoothed by polynomial fitting. Though the outputs of the numerical calculation are somewhat unstable at the current stage, it has been demonstrated to perform better than the algorithms neglecting the spatial variations of LRM and Doppler centroid, such as the ENLCSA, by point target simulations.
Auteurs: Yan Wang;Jingwen Li;Feng Xu;Jian Yang;
Apparue dans: IEEE Geoscience and Remote Sensing Letters
Date publication: 12.-2017, volume: 14, issue:12, pages: 2225 - 2229
Editeur: IEEE
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» A New Saliency-Driven Fusion Method Based on Complex Wavelet Transform for Remote Sensing Images
Résumé:
In remote sensing images, demands for spectral and spatial resolution vary from region to region. Regions with abundant texture and well-defined boundaries (like residential areas and roads) need more spatial details to provide better descriptions of various ground objects while regions such as farmland and mountains are mainly discriminated by spectral characteristic. However, most existing fusion algorithms for remote sensing images execute a unified processing in the whole image, leaving those important needs out of consideration. The employment of diverse fusion strategy for regions with different needs can provide an effective solution to this problem. In this letter, we propose a new saliency-driven fusion method based on complex wavelet transform. First, an adaptive saliency detection method based on clustering and spectral dissimilarity is presented to generate saliency factor for indicating diverse needs of the two kinds of resolutions in regions. Then, we combine nonlinear intensity–hue–saturation transform with multiresolution analysis based on dual-tree complex wavelet transform in order to complement each other’s advantages. Finally, saliency factor is employed to control the detail injection in the fusion, helping to satisfy different needs of different regions. Experiments reveal the validity and advantages of our proposal.
Auteurs: Libao Zhang;Jue Zhang;
Apparue dans: IEEE Geoscience and Remote Sensing Letters
Date publication: 12.-2017, volume: 14, issue:12, pages: 2433 - 2437
Editeur: IEEE
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» A New Tool for Investigating Complex Ionospheric Structures: Over-the-Horizon High-Frequency Sounding of Ionospheric Irregularities with a Chirp Ionosonde-Direction Finder
Résumé:
The ionosphere is characterized by a complicated inhomogeneous structure, and the scales of ionospheric irregularities vary from several meters to hundreds of kilometers. The irregularities may be caused by atmospheric turbulence as well as ionospheric plasma instabilities of different types. In fact, small-scale irregularities are more intensive in the high-latitude and nocturnal equatorial ionosphere, whereas at midlatitudes the small-scale irregularities component is expressed poorly. The most common inhomogeneous ionospheric structures at middle latitudes are traveling ionospheric disturbances (TIDs), which are the ionospheric responses to acoustic-gravity waves.
Auteurs: Valery P. Uryadov;Gennady G. Vertogradov;Elena G. Vertogradova;Vitaly G. Vertogradov;
Apparue dans: IEEE Antennas and Propagation Magazine
Date publication: 12.-2017, volume: 59, issue:6, pages: 62 - 76
Editeur: IEEE
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» A Non-Hysteretic Sub-60-mV/decade Subthreshold Slope and ON-Current Boosts in Electrostrictive-Piezoelectric Transistors
Résumé:
Sub-60-mV/decade subthreshold slope (SS) without the cost of hysteresis using smart electrostrictive-piezoelectric gate insulator of a field-effect transistor is presented. This exploits a combined effect of linear and non-linear electromechanical coupling of piezoelectricity and electrostriction in a gate insulator of the transistor. The electrostrictive-piezoelectric insulator in a gate stack of a transistor results in negative capacitance with an internal charge amplification, leading to a large on-current boost and sub-60-mV/decade SS in the transistor characteristics. Using load-line analysis and capacitance tuning of electrostrictive-piezoelectric gate insulator and semiconductor channel capacitors, the possibility of eliminating hysteresis in the device characteristics of sub-60-mV/decade steep transistors is discussed. The steep SS and the on-current boost can potentially enable the reduction of operating voltage of the transistor.
Auteurs: Raj K. Jana;
Apparue dans: IEEE Electron Device Letters
Date publication: 12.-2017, volume: 38, issue:12, pages: 1759 - 1762
Editeur: IEEE
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» A Non-Interleaved 12-b 330-MS/s Pipelined-SAR ADC With PVT-Stabilized Dynamic Amplifier Achieving Sub-1-dB SNDR Variation
Résumé:
A process, voltage, and temperature (PVT)-stabilized dynamic amplification technique is reported for the pipelined-successive-approximation-register (SAR) analog-to-digital converter (ADC). A non-interleaved 12-b 330-MS/s pipelined-SAR ADC prototype employing such technique achieves 0.5- and 0.8-dB signal-to-noise plus distortion ratio (SNDR) variations for supply voltage varying from 1.25 to 1.35 V and temperature varying from −5 °C to 85 °C, respectively. The corresponding residue gain variations are 1.5% and 1.2% under the same conditions, respectively. Moreover, 2-b/cycle SAR architecture together with the attenuated passive residue transfer technique is employed to boost the prototype conversion throughput significantly. Noise analyses of the attenuated passive residue transfer process and of the PVT stabilization circuit are also furnished. At 330 MS/s, the 65-nm CMOS prototype achieves an SNDR of 63.5 dB and a Walden FoM of 15.4 fJ/conversion step for a near-Nyquist input.
Auteurs: Hai Huang;Hongda Xu;Brian Elies;Yun Chiu;
Apparue dans: IEEE Journal of Solid-State Circuits
Date publication: 12.-2017, volume: 52, issue:12, pages: 3235 - 3247
Editeur: IEEE
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» A Non-Parametric Algorithm for Discovering Triggering Patterns of Spatio-Temporal Event Types
Résumé:
Temporal or spatio-temporal sequential pattern discovery is a well-recognized important problem in many domains like seismology, criminology, and finance. The majority of the current approaches are based on candidate generation which necessitates parameter tuning, namely, definition of a neighborhood, an interest measure, and a threshold value to evaluate candidates. However, their performance is limited as the success of these methods relies heavily on parameter settings. In this paper, we propose an algorithm which uses a nonparametric stochastic de-clustering procedure and a multivariate Hawkes model to define triggering relations within and among the event types and employs the estimated model to extract significant triggering patterns of event types. We tested the proposed method with real and synthetic data sets exhibiting different characteristics. The method gives good results that are comparable with the methods based on candidate generation in the literature.
Auteurs: Berna Bakır Batu;Tuğba Taşkaya Temizel;H. Şebnem Düzgün;
Apparue dans: IEEE Transactions on Knowledge and Data Engineering
Date publication: 12.-2017, volume: 29, issue:12, pages: 2629 - 2642
Editeur: IEEE
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» A Nonlinear Dynamics-Based Estimator for Functional Electrical Stimulation: Preliminary Results From Lower-Leg Extension Experiments
Résumé:
Miniature inertial measurement units (IMUs) are wearable sensors that measure limb segment or joint angles during dynamic movements. However, IMUs are generally prone to drift, external magnetic interference, and measurement noise. This paper presents a new class of nonlinear state estimation technique called state-dependent coefficient (SDC) estimation to accurately predict joint angles from IMU measurements. The SDC estimation method uses limb dynamics, instead of limb kinematics, to estimate the limb state. Importantly, the nonlinear limb dynamic model is formulated into state-dependent matrices that facilitate the estimator design without performing a Jacobian linearization. The estimation method is experimentally demonstrated to predict knee joint angle measurements during functional electrical stimulation of the quadriceps muscle. The nonlinear knee musculoskeletal model was identified through a series of experiments. The SDC estimator was then compared with an extended kalman filter (EKF), which uses a Jacobian linearization and a rotation matrix method, which uses a kinematic model instead of the dynamic model. Each estimator’s performance was evaluated against the true value of the joint angle, which was measured through a rotary encoder. The experimental results showed that the SDC estimator, the rotation matrix method, and EKF had root mean square errors of 2.70°, 2.86°, and 4.42°, respectively. Our preliminary experimental results show the new estimator’s advantage over the EKF method but a slight advantage over the rotation matrix method. However, the information from the dynamic model allows the SDC method to use only one IMU to measure the knee angle compared with the rotation matrix method that uses two IMUs to estimate the angle.
Auteurs: Marcus Allen;Qiang Zhong;Nicholas Kirsch;Ashwin Dani;William W. Clark;Nitin Sharma;
Apparue dans: IEEE Transactions on Neural Systems and Rehabilitation Engineering
Date publication: 12.-2017, volume: 25, issue:12, pages: 2365 - 2374
Editeur: IEEE
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» A Nonlinear Observer for Rotor Flux Estimation of Induction Motor Considering the Estimated Magnetization Characteristic
Résumé:
This paper proposes a nonlinear observer for induction machine drives based on space-vector dynamic model of induction machine, expressed in state form, which presents the peculiarity of taking into consideration the magnetic saturation of the iron core. This observer is particularly suitable in order to obtain high accuracy in rotor flux estimation, in both amplitude and phase position, during working conditions characterized by varying flux, among which the most important are those during electrical losses minimization. A Lyapunov-based convergence analysis is proposed in order to suitably compute the numerical observer gain guaranteeing the convergence of the estimation error. The proposed nonlinear observer has been tested by means of simulations and experiments carried out on a suitably developed test setup. Its behavior has been compared with that obtained with a standard full-order Luenberger observer that assumes the linearity of the magnetization characteristic. The paper shows the capability of the proposed nonlinear observer to correctly estimate amplitude and phase of the rotor flux under flux varying conditions. Moreover, the proposed observer exhibits a higher accuracy than that obtained with the standard observer, which does not consider the estimated magnetization characteristic.
Auteurs: Francesco Alonge;Maurizio Cirrincione;Marcello Pucci;Antonino Sferlazza;
Apparue dans: IEEE Transactions on Industry Applications
Date publication: 12.-2017, volume: 53, issue:6, pages: 5952 - 5965
Editeur: IEEE
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» A Novel Approach to Reliable Output Feedback Control of Fuzzy-Affine Systems With Time Delays and Sensor Faults
Résumé:
This paper proposes a novel system-augmentation approach to the delay-dependent reliable piecewise-affine $mathscr {H}_{infty }$ static output feedback control for nonlinear systems with time-varying delay and sensor faults in the piecewise-Markovian-Lyapunov-functional-based framework. The nonlinear plant is described by a continuous-time Takagi–Sugeno fuzzy-affine model with parametric uncertainties, and the sensor faults are characterized by a Markov process. Specifically, by applying a state-input augmentation technique, the original closed-loop system is first reformulated into a descriptor fuzzy-affine system. Based on a new piecewise-Markovian Lyapunov–Krasovskii functional, combined with a Wirtinger-based integral inequality, improved reciprocally convex inequality, and S-procedure, a novel bounded real lemma is then derived for the underlying closed-loop system. Furthermore, by taking advantage of the redundancy of descriptor system formulation, together with a linearization procedure, the piecewise-affine controller synthesis is carried out. It is shown that the desired piecewise-affine controller gains can be attained by solving a linear matrix inequality based optimization problem. Finally, simulation examples are performed to confirm the effectiveness and less conservatism of the presented approach.
Auteurs: Yanling Wei;Jianbin Qiu;Hak-Keung Lam;
Apparue dans: IEEE Transactions on Fuzzy Systems
Date publication: 12.-2017, volume: 25, issue:6, pages: 1808 - 1823
Editeur: IEEE
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» A Novel Architecture of Large Hybrid Cache With Reduced Energy
Résumé:
Energy becomes an inevitable challenge when using a large die-stacking dynamic random access memory (DRAM) cache. Although emerging spin-transfer-torque-RAM (STT-RAM) technology can efficiently reduce the static energy of large cache, it cannot completely replace DRAM cache due to the high write energy of STT-RAM. Recently, researchers have observed that there are many redundant bits written in the row buffer and futile bits written back to STT-RAM cells, which do not change the cells’ value but still cost high write energy. In this paper, we first design a large hybrid cache architecture with the DRAM region and the STT-RAM region to reduce the high static energy of DRAM cache. The selective write back to row buffer and selective write back to cell array optimizations are proposed to reduce high write energy of the STT-RAM region by removing the unnecessary bit-writes. Furthermore, we propose reuse distance-oriented data movement to reduce write operations in the STT-RAM region. Finally, we propose a novel tag design for the hybrid cache by moving all tag arrays to the STT-RAM region. The SPEC CPU2006 benchmarks show an average 28.3% energy reduction and 6.7% performance improvement for the write optimizations and 7.3% energy savings and 27.5% instructions per cycle speedups for the proposed tag design.
Auteurs: Jiacong He;Joseph Callenes-Sloan;
Apparue dans: IEEE Transactions on Circuits and Systems I: Regular Papers
Date publication: 12.-2017, volume: 64, issue:12, pages: 3092 - 3102
Editeur: IEEE
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» A Novel Filtering Balun and Improvement of Its Isolation Performance
Résumé:
A novel filtering balun is proposed in this letter. The filtering balun consists of three half-wavelength uniform-impedance microstrip resonators. Each resonator is coupled to external port through tapped line. Two resonators (called output resonators) connected to balanced output ports are in parallel coupled to the third resonator (called input resonator) connected to the unbalanced input port. The coupling locations have equal-magnitude and out-of-phase voltages, which provides balanced output signals. To improve the isolation performance, a microstrip stub is used to introduce coupling between the output resonators and an isolation resistor is added between the symmetrical position of the microstrip stub and the ground. The isolation resistor can obviously improve isolation performance and has no effect on the balanced output signals. The design is discussed in detail and a prototype filtering balun with center frequency of 2.4 GHz is designed, fabricated, and measured. The measured results have good agreement with the simulated ones, which confirms the novel filtering balun and the design method.
Auteurs: Jun-Mei Yan;Hai-Ying Zhou;Liang-Zu Cao;
Apparue dans: IEEE Microwave and Wireless Components Letters
Date publication: 12.-2017, volume: 27, issue:12, pages: 1056 - 1058
Editeur: IEEE
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» A Novel High Holding Voltage Dual-Direction SCR With Embedded Structure for HV ESD Protection
Résumé:
In order to boost the holding voltage of the multi-fingered dual-direction silicon-controlled rectifier, a novel embedded topology is proposed instead of the traditional interdigital multi-finger arrangement. It is verified in a 0.5- $mu text{m}$ 18-V standard CDMOS process and applied to the high-voltage electro-static discharge (ESD) protection. With equivalent circuit and 2D device simulation, the operation principle and working mechanism are analyzed. According to the TLP-test results, the holding voltage of the multi-finger device is greatly improved from 7.62 V (traditional interdigital structure) to 19.67 V (the proposed embedded structure), and it has a narrower ESD design window (9.26 V) than that of the interdigital counterpart (15.17 V). Furthermore, the principle of the multi-finger device with embedded topology features a superior holding voltage is explained by using the model of ladder resistance network. It is concluded that the Ron of the embedded structure is determined by the size of topology and almost unaffected by the number of fingers.
Auteurs: Jian Guan;Yang Wang;Shanwan Hao;Yifei Zheng;Xiangliang Jin;
Apparue dans: IEEE Electron Device Letters
Date publication: 12.-2017, volume: 38, issue:12, pages: 1716 - 1719
Editeur: IEEE
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» A Novel Hybrid Differential Algorithm for Turn to Turn Fault Detection in Shunt Reactors
Résumé:
Turn to turn faults usually cause smaller changes in the phase currents of a shunt reactor when fewer turns are involved. Designing a sensitive and reliable algorithm for turn to turn fault detection in shunt reactors still remains a challenge. In this paper, a novel hybrid differential algorithm has been proposed to detect turn to turn faults in shunt reactors. The proposed algorithm calculates the difference between normalized negative sequence terminal voltage and normalized negative sequence reactor current phasors. This difference value is used for detecting turn to turn fault in shunt reactors. The proposed algorithm can also identify the faulty phase. This is a significant improvement with respect to the existing negative or zero sequence based methods. The proposed algorithm does not need neural CT. Impedance values of the shunt reactors are also not needed in the calculations. The proposed algorithm can be applied to both solidly and impedance grounded shunt reactors. The performance of the proposed algorithm is evaluated using PSCAD simulations. It is found that the proposed algorithm is sensitive enough to detect lower level turn to turn faults. The proposed algorithm performs satisfactorily during system unbalances, reactor energizations, external faults, off-nominal frequency, and switch onto fault scenarios, etc.
Auteurs: Sarasij Das;Tarlochan S. Sidhu;Mohammad Reza Dadash Zadeh;Zhiying Zhang;
Apparue dans: IEEE Transactions on Power Delivery
Date publication: 12.-2017, volume: 32, issue:6, pages: 2537 - 2545
Editeur: IEEE
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